Lines Matching defs:upc
295 struct upc { struct
296 __be32 upgcr; /* UTOPIA/POS general configuration register */
297 __be32 uplpa; /* UTOPIA/POS last PHY address */
298 __be32 uphec; /* ATM HEC register */
299 __be32 upuc; /* UTOPIA/POS UCC configuration */
300 __be32 updc1; /* UTOPIA/POS device 1 configuration */
301 __be32 updc2; /* UTOPIA/POS device 2 configuration */
302 __be32 updc3; /* UTOPIA/POS device 3 configuration */
303 __be32 updc4; /* UTOPIA/POS device 4 configuration */
304 __be32 upstpa; /* UTOPIA/POS STPA threshold */
305 u8 res0[0xC];
306 __be32 updrs1_h; /* UTOPIA/POS device 1 rate select */
307 __be32 updrs1_l; /* UTOPIA/POS device 1 rate select */
308 __be32 updrs2_h; /* UTOPIA/POS device 2 rate select */
309 __be32 updrs2_l; /* UTOPIA/POS device 2 rate select */
310 __be32 updrs3_h; /* UTOPIA/POS device 3 rate select */
311 __be32 updrs3_l; /* UTOPIA/POS device 3 rate select */
312 __be32 updrs4_h; /* UTOPIA/POS device 4 rate select */
313 __be32 updrs4_l; /* UTOPIA/POS device 4 rate select */
314 __be32 updrp1; /* UTOPIA/POS device 1 receive priority low */
315 __be32 updrp2; /* UTOPIA/POS device 2 receive priority low */
316 __be32 updrp3; /* UTOPIA/POS device 3 receive priority low */
317 __be32 updrp4; /* UTOPIA/POS device 4 receive priority low */
318 __be32 upde1; /* UTOPIA/POS device 1 event */
319 __be32 upde2; /* UTOPIA/POS device 2 event */
320 __be32 upde3; /* UTOPIA/POS device 3 event */
321 __be32 upde4; /* UTOPIA/POS device 4 event */
322 __be16 uprp1;
323 __be16 uprp2;
324 __be16 uprp3;
325 __be16 uprp4;
326 u8 res1[0x8];
327 __be16 uptirr1_0; /* Device 1 transmit internal rate 0 */
328 __be16 uptirr1_1; /* Device 1 transmit internal rate 1 */
329 __be16 uptirr1_2; /* Device 1 transmit internal rate 2 */
330 __be16 uptirr1_3; /* Device 1 transmit internal rate 3 */
331 __be16 uptirr2_0; /* Device 2 transmit internal rate 0 */
332 __be16 uptirr2_1; /* Device 2 transmit internal rate 1 */
333 __be16 uptirr2_2; /* Device 2 transmit internal rate 2 */
334 __be16 uptirr2_3; /* Device 2 transmit internal rate 3 */
335 __be16 uptirr3_0; /* Device 3 transmit internal rate 0 */
336 __be16 uptirr3_1; /* Device 3 transmit internal rate 1 */
337 __be16 uptirr3_2; /* Device 3 transmit internal rate 2 */
338 __be16 uptirr3_3; /* Device 3 transmit internal rate 3 */
339 __be16 uptirr4_0; /* Device 4 transmit internal rate 0 */
340 __be16 uptirr4_1; /* Device 4 transmit internal rate 1 */
341 __be16 uptirr4_2; /* Device 4 transmit internal rate 2 */
342 __be16 uptirr4_3; /* Device 4 transmit internal rate 3 */
343 __be32 uper1; /* Device 1 port enable register */
344 __be32 uper2; /* Device 2 port enable register */
345 __be32 uper3; /* Device 3 port enable register */
346 __be32 uper4; /* Device 4 port enable register */
347 u8 res2[0x150];