Lines Matching defs:hdac_bus
286 struct hdac_bus { struct
288 const struct hdac_bus_ops *ops; argument
289 const struct hdac_ext_bus_ops *ext_ops;
292 unsigned long addr;
293 void __iomem *remap_addr;
294 int irq;
296 void __iomem *ppcap;
297 void __iomem *spbcap;
298 void __iomem *mlcap;
299 void __iomem *gtscap;
300 void __iomem *drsmcap;
303 struct list_head codec_list;
304 unsigned int num_codecs;
307 struct hdac_device *caddr_tbl[HDA_MAX_CODEC_ADDRESS + 1];
310 u32 unsol_queue[HDA_UNSOL_QUEUE_SIZE * 2]; /* ring buffer */
311 unsigned int unsol_rp, unsol_wp;
312 struct work_struct unsol_work;
315 unsigned long codec_mask;
318 unsigned long codec_powered;
321 struct hdac_rb corb;
322 struct hdac_rb rirb;
323 unsigned int last_cmd[HDA_MAX_CODECS]; /* last sent command */
324 wait_queue_head_t rirb_wq;
327 struct snd_dma_buffer rb;
328 struct snd_dma_buffer posbuf;
329 int dma_type; /* SNDRV_DMA_TYPE_XXX for CORB/RIRB */
332 struct list_head stream_list;
335 bool chip_init:1; /* h/w initialized */
338 bool aligned_mmio:1; /* aligned MMIO access */
339 bool sync_write:1; /* sync after verb write */
340 bool use_posbuf:1; /* use position buffer */
341 bool snoop:1; /* enable snooping */
342 bool align_bdle_4k:1; /* BDLE align 4K boundary */
343 bool reverse_assign:1; /* assign devices in reverse order */
344 bool corbrp_self_clear:1; /* CORBRP clears itself after reset */
345 bool polling_mode:1;
346 bool needs_damn_long_delay:1;
348 int poll_count;
350 int bdl_pos_adj; /* BDL position adjustment */
353 unsigned int dma_stop_delay;
377 int snd_hdac_bus_init(struct hdac_bus *bus, struct device *dev, argument