Lines Matching refs:mem_base
1148 void __iomem *mem_base; member
3654 writew(gpio_data, spec->mem_base + 0x320); in ca0113_mmio_gpio_set()
3671 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3672 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3673 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3674 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3675 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3677 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3678 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set()
3680 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3685 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set()
3691 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set()
3692 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set()
3693 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set()
3695 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set()
3696 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set()
3697 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3698 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set()
3710 writel(0x0000007e, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3711 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3712 writel(0x0000005a, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3713 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3714 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3716 writel(0x00800003, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3717 writel(group, spec->mem_base + 0x804); in ca0113_mmio_command_set_type2()
3719 writel(0x00800005, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3724 writel(write_val, spec->mem_base + 0x204); in ca0113_mmio_command_set_type2()
3726 readl(spec->mem_base + 0x860); in ca0113_mmio_command_set_type2()
3727 readl(spec->mem_base + 0x854); in ca0113_mmio_command_set_type2()
3728 readl(spec->mem_base + 0x840); in ca0113_mmio_command_set_type2()
3730 writel(0x00800004, spec->mem_base + 0x20c); in ca0113_mmio_command_set_type2()
3731 writel(0x00000000, spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3732 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
3733 readl(spec->mem_base + 0x210); in ca0113_mmio_command_set_type2()
7930 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7931 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7932 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7933 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7934 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7935 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7936 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7937 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7938 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7939 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
7940 writeb(0x00, spec->mem_base + 0x100); in ae5_post_dsp_register_set()
7941 writeb(0xff, spec->mem_base + 0x304); in ae5_post_dsp_register_set()
8874 writeb(0x0, spec->mem_base + 0x100); in sbz_region2_exit()
8876 writeb(0xb3, spec->mem_base + 0x304); in sbz_region2_exit()
9158 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9159 writel(0x00820680, spec->mem_base + 0x01C); in sbz_pre_dsp_setup()
9275 writel(0x00000000, spec->mem_base + addr[i]); in ca0132_mmio_init_sbz()
9298 writel(tmp[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9314 writel(data[i], spec->mem_base + addr[cur_addr + i]); in ca0132_mmio_init_sbz()
9328 writel(0x00000680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9329 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9338 writel(0x00800001, spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9342 writel(data[i], spec->mem_base + addr[i]); in ca0132_mmio_init_ae5()
9346 writel(0x00880680, spec->mem_base + 0x1c); in ca0132_mmio_init_ae5()
9408 writeb(tmp[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9415 writeb(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9418 writel(data[i], spec->mem_base + addr[cur_addr]); in ae5_register_set()
9420 writel(0x00800001, spec->mem_base + 0x20c); in ae5_register_set()
9668 if (spec->mem_base) in ca0132_free()
9669 pci_iounmap(codec->bus->pci, spec->mem_base); in ca0132_free()
10072 spec->mem_base = pci_iomap(codec->bus->pci, 2, 0xC20); in patch_ca0132()
10073 if (spec->mem_base == NULL) { in patch_ca0132()