Lines Matching refs:mask1
139 .mask1 = WM8776_DACVOL_MASK,
149 .mask1 = WM8776_DAC_PL_LL,
157 .mask1 = WM8776_DAC_DZCEN,
165 .mask1 = WM8776_HPVOL_MASK,
175 .mask1 = WM8776_PWR_HPPD,
183 .mask1 = WM8776_VOL_HPZCEN,
191 .mask1 = WM8776_OUTMUX_AUX,
197 .mask1 = WM8776_OUTMUX_BYPASS,
203 .mask1 = WM8776_DAC_IZD,
210 .mask1 = WM8776_PHASE_INVERTL,
218 .mask1 = WM8776_DAC2_DEEMPH,
226 .mask1 = WM8776_ADC_GAIN_MASK,
236 .mask1 = WM8776_ADC_MUTEL,
244 .mask1 = WM8776_ADC_MUX_AIN1,
250 .mask1 = WM8776_ADC_MUX_AIN2,
256 .mask1 = WM8776_ADC_MUX_AIN3,
262 .mask1 = WM8776_ADC_MUX_AIN4,
268 .mask1 = WM8776_ADC_MUX_AIN5,
284 .mask1 = WM8776_ALC1_LCT_MASK,
295 .mask1 = WM8776_ALC3_ATK_MASK,
306 .mask1 = WM8776_ALC3_DCY_MASK,
316 .mask1 = WM8776_LIM_TRANWIN_MASK,
324 .mask1 = WM8776_LIM_MAXATTEN_MASK,
334 .mask1 = WM8776_ALC1_LCT_MASK,
346 .mask1 = WM8776_ALC3_ATK_MASK,
357 .mask1 = WM8776_ALC3_DCY_MASK,
365 .mask1 = WM8776_ALC1_MAXGAIN_MASK,
375 .mask1 = WM8776_LIM_MAXATTEN_MASK,
389 .mask1 = WM8776_ALC2_HOLD_MASK,
396 .mask1 = WM8776_NGAT_ENABLE,
404 .mask1 = WM8776_NGAT_THR_MASK,
489 val1 = wm->regs[wm->ctl[n].reg1] & wm->ctl[n].mask1; in snd_wm8776_ctl_get()
490 val1 >>= __ffs(wm->ctl[n].mask1); in snd_wm8776_ctl_get()
527 val = wm->regs[wm->ctl[n].reg1] & ~wm->ctl[n].mask1; in snd_wm8776_ctl_put()
528 val |= regval1 << __ffs(wm->ctl[n].mask1); in snd_wm8776_ctl_put()