Lines Matching refs:regmap_field_write
77 ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_RESET); in lpass_hdmi_daiops_hw_params()
81 ret = regmap_field_write(drvdata->tx_ctl->soft_reset, LPASS_TX_CTL_CLEAR); in lpass_hdmi_daiops_hw_params()
85 ret = regmap_field_write(drvdata->hdmitx_legacy_en, LPASS_HDMITX_LEGACY_DISABLE); in lpass_hdmi_daiops_hw_params()
89 ret = regmap_field_write(drvdata->hdmitx_parity_calc_en, HDMITX_PARITY_CALC_EN); in lpass_hdmi_daiops_hw_params()
93 ret = regmap_field_write(drvdata->vbit_ctl->replace_vbit, REPLACE_VBIT); in lpass_hdmi_daiops_hw_params()
97 ret = regmap_field_write(drvdata->vbit_ctl->vbit_stream, LINEAR_PCM_DATA); in lpass_hdmi_daiops_hw_params()
101 ret = regmap_field_write(drvdata->hdmitx_ch_msb[0], ch_sts_buf1); in lpass_hdmi_daiops_hw_params()
105 ret = regmap_field_write(drvdata->hdmitx_ch_lsb[0], ch_sts_buf0); in lpass_hdmi_daiops_hw_params()
109 ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_chs, HW_MODE); in lpass_hdmi_daiops_hw_params()
113 ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_chs_sel, SW_MODE); in lpass_hdmi_daiops_hw_params()
117 ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->use_hw_usr, HW_MODE); in lpass_hdmi_daiops_hw_params()
121 ret = regmap_field_write(drvdata->hdmi_tx_dmactl[0]->hw_usr_sel, SW_MODE); in lpass_hdmi_daiops_hw_params()
125 ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_ENABLE); in lpass_hdmi_daiops_hw_params()
129 ret = regmap_field_write(meta_ctl->as_sdp_cc, channels - 1); in lpass_hdmi_daiops_hw_params()
133 ret = regmap_field_write(meta_ctl->as_sdp_ct, LPASS_META_DEFAULT_VAL); in lpass_hdmi_daiops_hw_params()
137 ret = regmap_field_write(meta_ctl->aif_db4, LPASS_META_DEFAULT_VAL); in lpass_hdmi_daiops_hw_params()
141 ret = regmap_field_write(meta_ctl->frequency, sampling_freq); in lpass_hdmi_daiops_hw_params()
145 ret = regmap_field_write(meta_ctl->mst_index, LPASS_META_DEFAULT_VAL); in lpass_hdmi_daiops_hw_params()
149 ret = regmap_field_write(meta_ctl->dptx_index, LPASS_META_DEFAULT_VAL); in lpass_hdmi_daiops_hw_params()
153 ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_DISABLE); in lpass_hdmi_daiops_hw_params()
157 ret = regmap_field_write(sstream_ctl->dma_sel, ch); in lpass_hdmi_daiops_hw_params()
161 ret = regmap_field_write(sstream_ctl->auto_bbit_en, LPASS_SSTREAM_DEFAULT_ENABLE); in lpass_hdmi_daiops_hw_params()
165 ret = regmap_field_write(sstream_ctl->layout, LPASS_SSTREAM_DEFAULT_DISABLE); in lpass_hdmi_daiops_hw_params()
169 ret = regmap_field_write(sstream_ctl->layout_sp, LPASS_LAYOUT_SP_DEFAULT); in lpass_hdmi_daiops_hw_params()
173 ret = regmap_field_write(sstream_ctl->dp_audio, LPASS_SSTREAM_DEFAULT_ENABLE); in lpass_hdmi_daiops_hw_params()
177 ret = regmap_field_write(sstream_ctl->set_sp_on_en, LPASS_SSTREAM_DEFAULT_ENABLE); in lpass_hdmi_daiops_hw_params()
181 ret = regmap_field_write(sstream_ctl->dp_sp_b_hw_en, LPASS_SSTREAM_DEFAULT_ENABLE); in lpass_hdmi_daiops_hw_params()
185 ret = regmap_field_write(sstream_ctl->dp_staffing_en, LPASS_SSTREAM_DEFAULT_ENABLE); in lpass_hdmi_daiops_hw_params()
196 ret = regmap_field_write(drvdata->sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE); in lpass_hdmi_daiops_prepare()
200 ret = regmap_field_write(drvdata->meta_ctl->mute, LPASS_MUTE_DISABLE); in lpass_hdmi_daiops_prepare()
217 ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_ENABLE); in lpass_hdmi_daiops_trigger()
221 ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_DISABLE); in lpass_hdmi_daiops_trigger()
229 ret = regmap_field_write(sstream_ctl->sstream_en, LPASS_SSTREAM_DISABLE); in lpass_hdmi_daiops_trigger()
233 ret = regmap_field_write(meta_ctl->mute, LPASS_MUTE_ENABLE); in lpass_hdmi_daiops_trigger()
237 ret = regmap_field_write(sstream_ctl->dp_audio, 0); in lpass_hdmi_daiops_trigger()