Lines Matching refs:supported
5 0, 0, EAX, 31:0, max_basic_leafs, Max input value for supported subleafs
21 1, 0, ECX, 1, pclmulqdq, PCLMULQDQ instruction supported
23 1, 0, ECX, 3, mwait, MONITOR/MWAIT supported
25 1, 0, ECX, 5, vmx, Virtual Machine Extensions supported
26 1, 0, ECX, 6, smx, Safer Mode Extension supported
31 1, 0, ECX, 11, sdbg, IA32_DEBUG_INTERFACE MSR for silicon debug supported
32 1, 0, ECX, 12, fma, FMA extensions using YMM state supported
33 1, 0, ECX, 13, cmpxchg16b, 'CMPXCHG16B - Compare and Exchange Bytes' supported
34 1, 0, ECX, 14, xtpr_update, xTPR Update Control supported
37 1, 0, ECX, 18, dca, Prefetching data from a memory mapped device supported
40 1, 0, ECX, 21, x2apic, x2APIC supported
41 1, 0, ECX, 22, movbe, MOVBE instruction supported
42 1, 0, ECX, 23, popcnt, POPCNT instruction supported
44 1, 0, ECX, 25, aesni, AESNI instruction supported
47 1, 0, ECX, 28, avx, AVX instruction supported
48 1, 0, ECX, 29, f16c, 16-bit floating-point conversion instruction supported
49 1, 0, ECX, 30, rdrand, RDRAND instruction supported
112 5, 0, ECX, 0, mwait_ext, Enum of Monitor-Mwait extensions supported
114 5, 0, EDX, 3:0, c0_sub_stats, Number of C0* sub C-states supported using MWAIT
115 5, 0, EDX, 7:4, c1_sub_stats, Number of C1* sub C-states supported using MWAIT
116 5, 0, EDX, 11:8, c2_sub_stats, Number of C2* sub C-states supported using MWAIT
117 5, 0, EDX, 15:12, c3_sub_stats, Number of C3* sub C-states supported using MWAIT
118 5, 0, EDX, 19:16, c4_sub_stats, Number of C4* sub C-states supported using MWAIT
119 5, 0, EDX, 23:20, c5_sub_stats, Number of C5* sub C-states supported using MWAIT
120 5, 0, EDX, 27:24, c6_sub_stats, Number of C6* sub C-states supported using MWAIT
121 5, 0, EDX, 31:28, c7_sub_stats, Number of C7* sub C-states supported using MWAIT
126 6, 0, EAX, 0, dig_temp, Digital temperature sensor supported
130 6, 0, EAX, 4, pln, Power limit notifications supported
131 6, 0, EAX, 5, ecmd, Clock modulation duty cycle extension supported
132 6, 0, EAX, 6, ptm, Package thermal management supported
139 6, 0, EAX, 13, hdc, HDC base registers supported
141 6, 0, EAX, 15, hwp_cap, Highest Performance change supported
142 6, 0, EAX, 16, hwp_peci, HWP PECI override is supported
143 6, 0, EAX, 17, hwp_flex, Flexible HWP is supported
144 6, 0, EAX, 18, hwp_fast, Fast access mode for the IA32_HWP_REQUEST MSR is supported
146 6, 0, EAX, 20, hwp_ignr, Ignoring Idle Logical Processor HWP request is supported
150 6, 0, ECX, 3, energ_bias, Performance-energy bias preference supported
157 7, 0, EBX, 0, fsgsbase, RDFSBASE/RDGSBASE/WRFSBASE/WRGSBASE supported
158 7, 0, EBX, 1, tsc_adjust, TSC_ADJUST MSR supported
256 0xD, 1, EAX, 1, xsavec, XSAVEC and compacted form supported
257 0xD, 1, EAX, 2, xgetbv, XGETBV supported
258 0xD, 1, EAX, 3, xsaves, XSAVES/XRSTORS and IA32_XSS supported
271 0xF, 0, EDX, 1, l3c_rdt_mon, L3 Cache RDT Monitoring supported
274 0xF, 1, EDX, 0, l3c_ocp_mon, L3 Cache occupancy Monitoring supported
275 0xF, 1, EDX, 1, l3c_tbw_mon, L3 Cache Total Bandwidth Monitoring supported
276 0xF, 1, EDX, 2, l3c_lbw_mon, L3 Cache Local Bandwidth Monitoring supported
281 0x10, 0, EBX, 1, l3c_rdt_alloc, L3 Cache Allocation supported
282 0x10, 0, EBX, 2, l2c_rdt_alloc, L2 Cache Allocation supported
283 0x10, 0, EBX, 3, mem_bw_alloc, Memory Bandwidth Allocation supported
291 0x12, 0, EAX, 0, sgx1, L3 Cache Allocation supported
292 0x12, 1, EAX, 0, sgx2, L3 Cache Allocation supported
316 0x17, 0, EAX, 31:0, max_socid, Maximum input value of supported sub-leaf
351 0x80000001, 0, EDX, 11, sysret, SYSCALL/SYSRET supported
353 0x80000001, 0, EDX, 26, 1gb_page, 1GB page supported
355 #0x80000001, 0, EDX, 29, 64b, 64b Architecture supported