Lines Matching refs:RCC_DDRITFCR
340 _CLK_FIXED(RCC_DDRITFCR, 0, DDRC1, _ACLK),
341 _CLK_FIXED(RCC_DDRITFCR, 1, DDRC1LP, _ACLK),
342 _CLK_FIXED(RCC_DDRITFCR, 2, DDRC2, _ACLK),
343 _CLK_FIXED(RCC_DDRITFCR, 3, DDRC2LP, _ACLK),
344 _CLK_FIXED(RCC_DDRITFCR, 4, DDRPHYC, _PLL2_R),
345 _CLK_FIXED(RCC_DDRITFCR, 5, DDRPHYCLP, _PLL2_R),
346 _CLK_FIXED(RCC_DDRITFCR, 6, DDRCAPB, _PCLK4),
347 _CLK_FIXED(RCC_DDRITFCR, 7, DDRCAPBLP, _PCLK4),
348 _CLK_FIXED(RCC_DDRITFCR, 8, AXIDCG, _ACLK),
349 _CLK_FIXED(RCC_DDRITFCR, 9, DDRPHYCAPB, _PCLK4),
350 _CLK_FIXED(RCC_DDRITFCR, 10, DDRPHYCAPBLP, _PCLK4),
2017 mmio_clrsetbits_32(rcc_base + RCC_DDRITFCR, in stm32mp1_clk_init()