Lines Matching refs:r0
34 ldcopr r0, SCTLR
35 orr r0, r0, r1
36 stcopr r0, SCTLR
46 ldr r0, =(SCR_RESET_VAL | SCR_SIF_BIT)
47 stcopr r0, SCR
68 ldcopr r0, NSACR
69 and r0, r0, #NSACR_IMP_DEF_MASK
70 orr r0, r0, #(NSACR_RESET_VAL | NSACR_ENABLE_FP_ACCESS)
71 stcopr r0, NSACR
87 ldr r0, =((CPACR_RESET_VAL | CPACR_ENABLE_FP_ACCESS) & ~(TRCDIS_BIT))
88 stcopr r0, CPACR
106 ldr r0, =(FPEXC_RESET_VAL | FPEXC_EN_BIT)
107 vmsr FPEXC, r0
124 ldr r0, =(SDCR_RESET_VAL | SDCR_SPD(SDCR_SPD_DISABLE) | SDCR_SCCD_BIT)
125 stcopr r0, SDCR
147 ldr r0, =(PMCR_RESET_VAL | PMCR_DP_BIT | PMCR_LC_BIT | \
150 ldr r0, =(PMCR_RESET_VAL | PMCR_DP_BIT)
152 stcopr r0, PMCR
158 ldcopr r0, ID_PFR0
159 and r0, r0, #(ID_PFR0_DIT_MASK << ID_PFR0_DIT_SHIFT)
160 cmp r0, #ID_PFR0_DIT_SUPPORTED
162 mrs r0, cpsr
163 orr r0, r0, #CPSR_DIT_BIT
164 msr cpsr_cxsf, r0
220 ldcopr r0, SCR
221 tst r0, #SCR_NS_BIT
245 ldr r0, =(SCTLR_RESET_VAL & ~(SCTLR_TE_BIT | SCTLR_EE_BIT | \
247 stcopr r0, SCTLR
268 cmp r0, #0
269 bxne r0
284 ldr r0, =pie_fixup
286 and r0, r0, r1
288 add r1, r1, r0
297 ldr r0, =\_exception_vectors
298 stcopr r0, VBAR
299 stcopr r0, MVBAR
322 cmp r0, #0
361 ldr r0, =__RW_START__
363 sub r1, r1, r0
372 ldr r0, =__BSS_START__
374 sub r1, r1, r0
378 ldr r0, =__COHERENT_RAM_START__
380 sub r1, r1, r0
392 ldr r0, =__DATA_RAM_START__
395 sub r2, r2, r0