Lines Matching refs:x16
63 mrs x16, dbgvcr32_el2
64 str x16, [x0, #CTX_DBGVCR32_EL2]
80 mrs x16, ICC_SRE_EL2
81 stp x15, x16, [x0, #CTX_HSTR_EL2]
99 mrs x16, sp_el2
100 stp x15, x16, [x0, #CTX_SPSR_EL2]
115 mrs x16, vttbr_el2
116 stp x15, x16, [x0, #CTX_VTCR_EL2]
136 mrs x16, MPAMVPM4_EL2
137 stp x15, x16, [x0, #CTX_MPAMVPM3_EL2]
154 mrs x16, HFGITR_EL2
155 stp x15, x16, [x0, #CTX_HDFGWTR_EL2]
178 mrs x16, vncr_el2
179 str x16, [x0, #CTX_VNCR_EL2]
232 ldr x16, [x0, #CTX_DBGVCR32_EL2]
233 msr dbgvcr32_el2, x16
248 ldp x15, x16, [x0, #CTX_HSTR_EL2]
250 msr ICC_SRE_EL2, x16
267 ldp x15, x16, [x0, #CTX_SPSR_EL2]
269 msr sp_el2, x16
283 ldp x15, x16, [x0, #CTX_VTCR_EL2]
285 msr vttbr_el2, x16
304 ldp x15, x16, [x0, #CTX_MPAMVPM3_EL2]
306 msr MPAMVPM4_EL2, x16
322 ldp x15, x16, [x0, #CTX_HDFGWTR_EL2]
324 msr HFGITR_EL2, x16
347 ldr x16, [x0, #CTX_VNCR_EL2]
348 msr vncr_el2, x16
385 mrs x16, tcr_el1
386 stp x15, x16, [x0, #CTX_SCTLR_EL1]
405 mrs x16, actlr_el1
407 stp x16, x17, [x0, #CTX_ACTLR_EL1]
418 mrs x16, afsr1_el1
419 stp x15, x16, [x0, #CTX_AFSR0_EL1]
436 mrs x16, ifsr32_el2
437 stp x15, x16, [x0, #CTX_DACR32_EL2]
457 mrs x16, TFSR_EL1
458 stp x15, x16, [x0, #CTX_TFSRE0_EL1]
483 ldp x15, x16, [x0, #CTX_SCTLR_EL1]
485 msr tcr_el1, x16
504 ldp x16, x17, [x0, #CTX_ACTLR_EL1]
505 msr actlr_el1, x16
516 ldp x15, x16, [x0, #CTX_AFSR0_EL1]
518 msr afsr1_el1, x16
534 ldp x15, x16, [x0, #CTX_DACR32_EL2]
536 msr ifsr32_el2, x16
689 stp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
816 ldp x16, x17, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X16]
899 ldp x16, x17, [sp, #CTX_EL3STATE_OFFSET + CTX_SPSR_EL3]
901 msr spsr_el3, x16