Lines Matching refs:x9
47 mrs x9, actlr_el2
49 stp x9, x10, [x0, #CTX_ACTLR_EL2]
67 mrs x9, elr_el2
69 stp x9, x10, [x0, #CTX_ELR_EL2]
83 mrs x9, ICH_HCR_EL2
85 stp x9, x10, [x0, #CTX_ICH_HCR_EL2]
102 mrs x9, tcr_el2
104 stp x9, x10, [x0, #CTX_TCR_EL2]
119 mrs x9, TFSR_EL2
120 str x9, [x0, #CTX_TFSR_EL2]
139 mrs x9, MPAMVPM5_EL2
141 stp x9, x10, [x0, #CTX_MPAMVPM5_EL2]
157 mrs x9, HFGRTR_EL2
159 stp x9, x10, [x0, #CTX_HFGRTR_EL2]
182 mrs x9, vsesr_el2
184 stp x9, x10, [x0, #CTX_VSESR_EL2]
216 ldp x9, x10, [x0, #CTX_ACTLR_EL2]
217 msr actlr_el2, x9
236 ldp x9, x10, [x0, #CTX_ELR_EL2]
237 msr elr_el2, x9
252 ldp x9, x10, [x0, #CTX_ICH_HCR_EL2]
253 msr ICH_HCR_EL2, x9
271 ldp x9, x10, [x0, #CTX_TCR_EL2]
272 msr tcr_el2, x9
288 ldr x9, [x0, #CTX_TFSR_EL2]
289 msr TFSR_EL2, x9
308 ldp x9, x10, [x0, #CTX_MPAMVPM5_EL2]
309 msr MPAMVPM5_EL2, x9
326 ldp x9, x10, [x0, #CTX_HFGRTR_EL2]
327 msr HFGRTR_EL2, x9
351 ldp x9, x10, [x0, #CTX_VSESR_EL2]
352 msr vsesr_el2, x9
379 mrs x9, spsr_el1
381 stp x9, x10, [x0, #CTX_SPSR_EL1]
390 mrs x9, csselr_el1
391 stp x17, x9, [x0, #CTX_CPACR_EL1]
409 mrs x9, tpidr_el0
411 stp x9, x10, [x0, #CTX_TPIDR_EL0]
422 mrs x9, vbar_el1
423 stp x17, x9, [x0, #CTX_CONTEXTIDR_EL1]
460 mrs x9, RGSR_EL1
462 stp x9, x10, [x0, #CTX_RGSR_EL1]
478 ldp x9, x10, [x0, #CTX_SPSR_EL1]
479 msr spsr_el1, x9
488 ldp x17, x9, [x0, #CTX_CPACR_EL1]
490 msr csselr_el1, x9
508 ldp x9, x10, [x0, #CTX_TPIDR_EL0]
509 msr tpidr_el0, x9
520 ldp x17, x9, [x0, #CTX_CONTEXTIDR_EL1]
522 msr vbar_el1, x9
599 mrs x9, fpsr
600 str x9, [x0, #CTX_FP_FPSR]
644 ldr x9, [x0, #CTX_FP_FPSR]
645 msr fpsr, x9
685 stp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]
706 mrs x9, mdcr_el3
707 tst x9, x10
711 mrs x9, pmcr_el0
719 str x9, [sp, #CTX_EL3STATE_OFFSET + CTX_PMCR_EL0]
722 2: orr x9, x9, #PMCR_EL0_DP_BIT
723 msr pmcr_el0, x9
770 ldp x8, x9, [x10, #CTX_PACGAKEY_LO] /* x9:x8 = APGAKey */
781 msr APGAKeyHi_EL1, x9
812 ldp x8, x9, [sp, #CTX_GPREGS_OFFSET + CTX_GPREG_X8]