Lines Matching refs:data
111 unsigned int data, mask; in hikey960_ufs_reset() local
116 data = mmio_read_32(UFS_SYS_PHY_CLK_CTRL_REG); in hikey960_ufs_reset()
117 } while (data & BIT_SYSCTRL_REF_CLOCK_EN); in hikey960_ufs_reset()
128 data = mmio_read_32(CRG_PERRSTSTAT3_REG); in hikey960_ufs_reset()
129 } while ((data & PERI_UFS_BIT) == 0); in hikey960_ufs_reset()
140 data = SC_DIV_UFSPHY_CFG(3); in hikey960_ufs_reset()
141 mmio_write_32(CRG_CLKDIV16_REG, mask | data); in hikey960_ufs_reset()
142 data = mmio_read_32(UFS_SYS_PHY_CLK_CTRL_REG); in hikey960_ufs_reset()
143 data &= ~MASK_SYSCTRL_CFG_CLOCK_FREQ; in hikey960_ufs_reset()
144 data |= 0x39; in hikey960_ufs_reset()
145 mmio_write_32(UFS_SYS_PHY_CLK_CTRL_REG, data); in hikey960_ufs_reset()
166 data = mmio_read_32(CRG_PERRSTSTAT3_REG); in hikey960_ufs_reset()
167 } while (data & PERI_UFS_BIT); in hikey960_ufs_reset()
237 unsigned int data = 0; in bl1_plat_set_ep_info() local
254 data = read_cpacr_el1(); in bl1_plat_set_ep_info()
256 data |= 3 << 20; in bl1_plat_set_ep_info()
257 write_cpacr_el1(data); in bl1_plat_set_ep_info()
258 data = read_cpacr_el1(); in bl1_plat_set_ep_info()
259 } while ((data & (3 << 20)) != (3 << 20)); in bl1_plat_set_ep_info()
260 INFO("cpacr_el1:0x%x\n", data); in bl1_plat_set_ep_info()