Lines Matching refs:state
169 static void _pwr_suspend(const psci_power_state_t *state) in _pwr_suspend() argument
175 if (state->pwr_domain_state[PLAT_MAX_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend()
183 } else if (state->pwr_domain_state[PLAT_MAX_LVL] in _pwr_suspend()
194 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] == in _pwr_suspend()
205 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] == in _pwr_suspend()
216 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend()
227 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend()
241 static void _pwr_suspend_finish(const psci_power_state_t *state) in _pwr_suspend_finish() argument
248 if (state->pwr_domain_state[PLAT_MAX_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend_finish()
258 } else if (state->pwr_domain_state[PLAT_MAX_LVL] in _pwr_suspend_finish()
271 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] == in _pwr_suspend_finish()
284 else if (state->pwr_domain_state[PLAT_CLSTR_LVL] == in _pwr_suspend_finish()
297 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_OFF_STATE) { in _pwr_suspend_finish()
309 else if (state->pwr_domain_state[PLAT_CORE_LVL] == PLAT_MAX_RET_STATE) { in _pwr_suspend_finish()
339 psci_power_state_t *state) in _pwr_state_validate() argument
348 state->pwr_domain_state[PLAT_MAX_LVL] = in _pwr_state_validate()
351 state->pwr_domain_state[PLAT_MAX_LVL] = in _pwr_state_validate()
356 state->pwr_domain_state[PLAT_SYS_LVL] = in _pwr_state_validate()
359 state->pwr_domain_state[PLAT_SYS_LVL] = in _pwr_state_validate()
364 state->pwr_domain_state[PLAT_CLSTR_LVL] = in _pwr_state_validate()
367 state->pwr_domain_state[PLAT_CLSTR_LVL] = in _pwr_state_validate()
374 state->pwr_domain_state[PLAT_CORE_LVL] = in _pwr_state_validate()
377 state->pwr_domain_state[PLAT_CORE_LVL] = in _pwr_state_validate()