Lines Matching refs:ver
34 static unsigned int ver; in zynqmp_get_silicon_ver() local
36 if (!ver) { in zynqmp_get_silicon_ver()
37 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + in zynqmp_get_silicon_ver()
39 ver &= ZYNQMP_SILICON_VER_MASK; in zynqmp_get_silicon_ver()
40 ver >>= ZYNQMP_SILICON_VER_SHIFT; in zynqmp_get_silicon_ver()
43 return ver; in zynqmp_get_silicon_ver()
48 unsigned int ver = zynqmp_get_silicon_ver(); in zynqmp_get_uart_clk() local
50 if (ver == ZYNQMP_CSU_VERSION_QEMU) in zynqmp_get_uart_clk()
59 unsigned int ver; member
69 .ver = 0x2c,
78 .ver = 0x2c,
88 .ver = 0x100,
94 .ver = 0x12c,
104 .ver = 0x100,
110 .ver = 0x12c,
120 .ver = 0x100,
126 .ver = 0x12c,
135 .ver = 0x2c,
144 .ver = 0x2c,
221 uint32_t id, ver, chipid[2]; in zynqmp_get_silicon_idcode_name() local
242 ver = chipid[1] >> ZYNQMP_EFUSE_IPDISABLE_SHIFT; in zynqmp_get_silicon_idcode_name()
246 zynqmp_devices[i].ver == (ver & ZYNQMP_CSU_VERSION_MASK)) in zynqmp_get_silicon_idcode_name()
261 if (ver & ZYNQMP_PL_STATUS_MASK) in zynqmp_get_silicon_idcode_name()
276 uint32_t ver; in zynqmp_get_rtl_ver() local
278 ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET); in zynqmp_get_rtl_ver()
279 ver &= ZYNQMP_RTL_VER_MASK; in zynqmp_get_rtl_ver()
280 ver >>= ZYNQMP_RTL_VER_SHIFT; in zynqmp_get_rtl_ver()
282 return ver; in zynqmp_get_rtl_ver()
306 uint32_t ver = mmio_read_32(ZYNQMP_CSU_BASEADDR + ZYNQMP_CSU_VERSION_OFFSET); in zynqmp_get_ps_ver() local
308 ver &= ZYNQMP_PS_VER_MASK; in zynqmp_get_ps_ver()
309 ver >>= ZYNQMP_PS_VER_SHIFT; in zynqmp_get_ps_ver()
311 return ver + 1; in zynqmp_get_ps_ver()
316 unsigned int ver = zynqmp_get_silicon_ver(); in zynqmp_print_platform_name() local
320 switch (ver) { in zynqmp_print_platform_name()
374 unsigned int ver = zynqmp_get_silicon_ver(); in plat_get_syscnt_freq2() local
376 if (ver == ZYNQMP_CSU_VERSION_QEMU) in plat_get_syscnt_freq2()