Lines Matching refs:signal
8677 the platform IC uses to signal each type of interrupt supported by the framework
14786 components of the system may use one of the asynchronous exceptions to signal
17380 RAS nodes can signal errors to the PE by raising Fault Handling and/or Error
17818 macro takes only one parameter: an SGI number to signal other PEs.
19539 endpoint to signal another for service provision, without hindering its current
19559 A sender can signal notifications once the receiver has provided it with
19922 Pair of interfaces to manage permissions to signal notifications. Prior to
19923 handling notifications, an FF\sphinxhyphen{}A endpoint must allow a given sender to signal a
20124 how to signal start and completion of secure interrupt handling as discussed in
20134 either the FFA\_INTERRUPT interface with ERET conduit or vIRQ signal for signaling
20136 the SPMD uses the FFA\_INTERRUPT ABI with ERET conduit to signal interrupt to SPMC
20172 interrupt. It pends vIRQ signal and
20189 is pending. It pends vIRQ signal and
20204 SPMC pends the vIRQ signal but does
20219 SPMC pends the vIRQ signal and resumes
20254 of target SP, SPMC resumes current SP after signal completion by target SP
21230 instruction to signal completion of the request. Some example use cases are
21400 \sphinxcode{\sphinxupquote{MM\_SP\_EVENT\_COMPLETE\_AARCH64}} call (described later) to signal read…
21630 was made to signal either completion of Secure Partition initialisation or
21765 …re Partition must only call \sphinxcode{\sphinxupquote{MM\_SP\_EVENT\_COMPLETE\_AARCH64}} to signal
22132 signal that it is initialised and ready to receive run\sphinxhyphen{}time requests.
31011 \subsubsection{Mapping of interrupt type to signal}
31012 \label{\detokenize{design/interrupt-framework-design:mapping-of-interrupt-type-to-signal}}
31016 FIQ or IRQ signal to the CPU depending upon the current security state. The
31017 mapping between the type and signal is known only to the platform. The framework
31024 FIQ signal while Non\sphinxhyphen{}secure interrupts are signaled through the IRQ signal.
31028 \paragraph{Effect of mapping of several interrupt types to one signal}
31029 …nize{design/interrupt-framework-design:effect-of-mapping-of-several-interrupt-types-to-one-signal}}
31032 interrupt signal, and if any one of the interrupt type sets \sphinxstylestrong{TEL3=1} for a
31033 particular security state, then interrupt signal will be routed to EL3 when in
31035 same interrupt signal will be forced to the same routing model. This should be
31041 signal. So if either one of the interrupt type sets the routing model so
31043 route the FIQ signal to EL3 when executing in Secure\sphinxhyphen{}EL1/Secure\sphinxhyphen{}EL0, th…
31128 is considered and it is assumed that the FIQ signal is used to generate Secure\sphinxhyphen{}EL1
31129 interrupts and the IRQ signal is used to generate non\sphinxhyphen{}secure interrupts in either
31451 the FIQ signal is used to generate Secure\sphinxhyphen{}EL1 interrupts and the IRQ signal
31820 signal completion of interrupt handling.
31894 identifier to signal preemption of TSP. The TSPD SMC handler,
32024 … and calling the \sphinxcode{\sphinxupquote{plat\_ic\_end\_of\_interrupt()}} platform API to signal