Lines Matching refs:BIT

155 #define FSPI_MCR0_LEARN_EN		BIT(15)
156 #define FSPI_MCR0_SCRFRUN_EN BIT(14)
157 #define FSPI_MCR0_OCTCOMB_EN BIT(13)
158 #define FSPI_MCR0_DOZE_EN BIT(12)
159 #define FSPI_MCR0_HSEN BIT(11)
160 #define FSPI_MCR0_SERCLKDIV BIT(8)
161 #define FSPI_MCR0_ATDF_EN BIT(7)
162 #define FSPI_MCR0_ARDF_EN BIT(6)
165 #define FSPI_MCR0_MDIS BIT(1)
166 #define FSPI_MCR0_SWRST BIT(0)
187 #define FSPI_MCR2_SAMEDEVICEEN BIT(15)
188 #define FSPI_MCR2_CLRLRPHS BIT(14)
189 #define FSPI_MCR2_ABRDATSZ BIT(8)
190 #define FSPI_MCR2_ABRLEARN BIT(7)
191 #define FSPI_MCR2_ABR_READ BIT(6)
192 #define FSPI_MCR2_ABRWRITE BIT(5)
193 #define FSPI_MCR2_ABRDUMMY BIT(4)
194 #define FSPI_MCR2_ABR_MODE BIT(3)
195 #define FSPI_MCR2_ABRCADDR BIT(2)
196 #define FSPI_MCR2_ABRRADDR BIT(1)
197 #define FSPI_MCR2_ABR_CMD BIT(0)
200 #define FSPI_AHBCR_RDADDROPT BIT(6)
201 #define FSPI_AHBCR_PREF_EN BIT(5)
202 #define FSPI_AHBCR_BUFF_EN BIT(4)
203 #define FSPI_AHBCR_CACH_EN BIT(3)
204 #define FSPI_AHBCR_CLRTXBUF BIT(2)
205 #define FSPI_AHBCR_CLRRXBUF BIT(1)
206 #define FSPI_AHBCR_PAR_EN BIT(0)
209 #define FSPI_INTEN_SCLKSBWR BIT(9)
210 #define FSPI_INTEN_SCLKSBRD BIT(8)
211 #define FSPI_INTEN_DATALRNFL BIT(7)
212 #define FSPI_INTEN_IPTXWE BIT(6)
213 #define FSPI_INTEN_IPRXWA BIT(5)
214 #define FSPI_INTEN_AHBCMDERR BIT(4)
215 #define FSPI_INTEN_IPCMDERR BIT(3)
216 #define FSPI_INTEN_AHBCMDGE BIT(2)
217 #define FSPI_INTEN_IPCMDGE BIT(1)
218 #define FSPI_INTEN_IPCMDDONE BIT(0)
221 #define FSPI_INTR_SCLKSBWR BIT(9)
222 #define FSPI_INTR_SCLKSBRD BIT(8)
223 #define FSPI_INTR_DATALRNFL BIT(7)
224 #define FSPI_INTR_IPTXWE BIT(6)
225 #define FSPI_INTR_IPRXWA BIT(5)
226 #define FSPI_INTR_AHBCMDERR BIT(4)
227 #define FSPI_INTR_IPCMDERR BIT(3)
228 #define FSPI_INTR_AHBCMDGE BIT(2)
229 #define FSPI_INTR_IPCMDGE BIT(1)
230 #define FSPI_INTR_IPCMDDONE BIT(0)
250 #define FSPI_AHBRXBUF0CR7_PREF BIT(31)
274 #define FSPI_FLSHXCR1_WA BIT(10)
287 #define FSPI_FLSHXCR2_CLRINSP BIT(24)
288 #define FSPI_FLSHXCR2_AWRWAIT BIT(16)
297 #define FSPI_IPCR1_IPAREN BIT(31)
303 #define FSPI_IPCMD_TRG BIT(0)
331 #define FSPI_IPRXFCR_CLR BIT(0)
332 #define FSPI_IPRXFCR_DMA_EN BIT(1)
336 #define FSPI_IPTXFCR_CLR BIT(0)
337 #define FSPI_IPTXFCR_DMA_EN BIT(1)
341 #define FSPI_DLLACR_OVRDEN BIT(8)
344 #define FSPI_DLLBCR_OVRDEN BIT(8)
350 #define FSPI_STS0_ARB_IDLE BIT(1)
351 #define FSPI_STS0_SEQ_IDLE BIT(0)
362 #define FSPI_AHBSPNST_ACTIVE BIT(0)