Lines Matching refs:x
56 #define FSPI_INSTR_OPRND0(x) (x << FSPI_INSTR_OPRND0_SHIFT) argument
58 #define FSPI_INSTR_PAD0(x) ((x) << FSPI_INSTR_PAD0_SHIFT) argument
60 #define FSPI_INSTR_OPCODE0(x) ((x) << FSPI_INSTR_OPCODE0_SHIFT) argument
62 #define FSPI_INSTR_OPRND1(x) ((x) << FSPI_INSTR_OPRND1_SHIFT) argument
64 #define FSPI_INSTR_PAD1(x) ((x) << FSPI_INSTR_PAD1_SHIFT) argument
66 #define FSPI_INSTR_OPCODE1(x) ((x) << FSPI_INSTR_OPCODE1_SHIFT) argument
153 #define FSPI_MCR0_AHB_TIMEOUT(x) ((x) << 24) argument
154 #define FSPI_MCR0_IP_TIMEOUT(x) ((x) << 16) argument
163 #define FSPI_MCR0_RXCLKSRC(x) ((x) << 4) argument
164 #define FSPI_MCR0_END_CFG(x) ((x) << 2) argument
182 #define FSPI_MCR1_SEQ_TIMEOUT(x) ((x) << 16) argument
183 #define FSPI_MCR1_AHB_TIMEOUT(x) (x) argument
186 #define FSPI_MCR2_IDLE_WAIT(x) ((x) << 24) argument
266 #define FSPI_FLSHXCR0_SZ(x) ((x) >> FSPI_FLSHXCR0_SZ_KB) argument
272 #define FSPI_FLSHXCR1_CSINTR(x) ((x) << 16) argument
273 #define FSPI_FLSHXCR1_CAS(x) ((x) << 11) argument
275 #define FSPI_FLSHXCR1_TCSH(x) ((x) << 5) argument
276 #define FSPI_FLSHXCR1_TCSS(x) (x) argument
300 #define FSPI_IPCR1_IDATSZ(x) (x) argument
333 #define FSPI_IPRXFCR_WMRK(x) ((x) << 2) argument
338 #define FSPI_IPTXFCR_WMRK(x) ((x) << 2) argument
347 #define FSPI_STS0_DLPHB(x) ((x) << 8) argument
348 #define FSPI_STS0_DLPHA(x) ((x) << 4) argument
349 #define FSPI_STS0_CMD_SRC(x) ((x) << 2) argument
354 #define FSPI_STS1_IP_ERRCD(x) ((x) << 24) argument
355 #define FSPI_STS1_IP_ERRID(x) ((x) << 16) argument
356 #define FSPI_STS1_AHB_ERRCD(x) ((x) << 8) argument
357 #define FSPI_STS1_AHB_ERRID(x) (x) argument
360 #define FSPI_AHBSPNST_DATLFT(x) ((x) << 16) argument
361 #define FSPI_AHBSPNST_BUFID(x) ((x) << 1) argument
365 #define FSPI_IPRXFSTS_RDCNTR(x) ((x) << 16) argument
366 #define FSPI_IPRXFSTS_FILL(x) (x) argument
369 #define FSPI_IPTXFSTS_WRCNTR(x) ((x) << 16) argument
370 #define FSPI_IPTXFSTS_FILL(x) (x) argument