Lines Matching refs:reg
581 uint32_t reg; in pfc_init_g2h() local
958 reg = mmio_read_32(PFC_DRVCTRL0); in pfc_init_g2h()
959 reg = (reg & DRVCTRL0_MASK) | in pfc_init_g2h()
968 pfc_reg_write(PFC_DRVCTRL0, reg); in pfc_init_g2h()
970 reg = mmio_read_32(PFC_DRVCTRL1); in pfc_init_g2h()
971 reg = (reg & DRVCTRL1_MASK) | in pfc_init_g2h()
980 pfc_reg_write(PFC_DRVCTRL1, reg); in pfc_init_g2h()
982 reg = mmio_read_32(PFC_DRVCTRL2); in pfc_init_g2h()
983 reg = (reg & DRVCTRL2_MASK) | in pfc_init_g2h()
992 pfc_reg_write(PFC_DRVCTRL2, reg); in pfc_init_g2h()
994 reg = mmio_read_32(PFC_DRVCTRL3); in pfc_init_g2h()
995 reg = (reg & DRVCTRL3_MASK) | in pfc_init_g2h()
1004 pfc_reg_write(PFC_DRVCTRL3, reg); in pfc_init_g2h()
1006 reg = mmio_read_32(PFC_DRVCTRL4); in pfc_init_g2h()
1007 reg = (reg & DRVCTRL4_MASK) | in pfc_init_g2h()
1016 pfc_reg_write(PFC_DRVCTRL4, reg); in pfc_init_g2h()
1018 reg = mmio_read_32(PFC_DRVCTRL5); in pfc_init_g2h()
1019 reg = (reg & DRVCTRL5_MASK) | in pfc_init_g2h()
1028 pfc_reg_write(PFC_DRVCTRL5, reg); in pfc_init_g2h()
1030 reg = mmio_read_32(PFC_DRVCTRL6); in pfc_init_g2h()
1031 reg = (reg & DRVCTRL6_MASK) | in pfc_init_g2h()
1040 pfc_reg_write(PFC_DRVCTRL6, reg); in pfc_init_g2h()
1042 reg = mmio_read_32(PFC_DRVCTRL7); in pfc_init_g2h()
1043 reg = (reg & DRVCTRL7_MASK) | in pfc_init_g2h()
1052 pfc_reg_write(PFC_DRVCTRL7, reg); in pfc_init_g2h()
1054 reg = mmio_read_32(PFC_DRVCTRL8); in pfc_init_g2h()
1055 reg = (reg & DRVCTRL8_MASK) | in pfc_init_g2h()
1064 pfc_reg_write(PFC_DRVCTRL8, reg); in pfc_init_g2h()
1066 reg = mmio_read_32(PFC_DRVCTRL9); in pfc_init_g2h()
1067 reg = (reg & DRVCTRL9_MASK) | in pfc_init_g2h()
1076 pfc_reg_write(PFC_DRVCTRL9, reg); in pfc_init_g2h()
1078 reg = mmio_read_32(PFC_DRVCTRL10); in pfc_init_g2h()
1079 reg = (reg & DRVCTRL10_MASK) | in pfc_init_g2h()
1088 pfc_reg_write(PFC_DRVCTRL10, reg); in pfc_init_g2h()
1090 reg = mmio_read_32(PFC_DRVCTRL11); in pfc_init_g2h()
1091 reg = (reg & DRVCTRL11_MASK) | in pfc_init_g2h()
1100 pfc_reg_write(PFC_DRVCTRL11, reg); in pfc_init_g2h()
1102 reg = mmio_read_32(PFC_DRVCTRL12); in pfc_init_g2h()
1103 reg = (reg & DRVCTRL12_MASK) | in pfc_init_g2h()
1108 pfc_reg_write(PFC_DRVCTRL12, reg); in pfc_init_g2h()
1110 reg = mmio_read_32(PFC_DRVCTRL13); in pfc_init_g2h()
1111 reg = (reg & DRVCTRL13_MASK) | in pfc_init_g2h()
1120 pfc_reg_write(PFC_DRVCTRL13, reg); in pfc_init_g2h()
1122 reg = mmio_read_32(PFC_DRVCTRL14); in pfc_init_g2h()
1123 reg = (reg & DRVCTRL14_MASK) | in pfc_init_g2h()
1132 pfc_reg_write(PFC_DRVCTRL14, reg); in pfc_init_g2h()
1134 reg = mmio_read_32(PFC_DRVCTRL15); in pfc_init_g2h()
1135 reg = (reg & DRVCTRL15_MASK) | in pfc_init_g2h()
1144 pfc_reg_write(PFC_DRVCTRL15, reg); in pfc_init_g2h()
1146 reg = mmio_read_32(PFC_DRVCTRL16); in pfc_init_g2h()
1147 reg = (reg & DRVCTRL16_MASK) | in pfc_init_g2h()
1156 pfc_reg_write(PFC_DRVCTRL16, reg); in pfc_init_g2h()
1158 reg = mmio_read_32(PFC_DRVCTRL17); in pfc_init_g2h()
1159 reg = (reg & DRVCTRL17_MASK) | in pfc_init_g2h()
1168 pfc_reg_write(PFC_DRVCTRL17, reg); in pfc_init_g2h()
1170 reg = mmio_read_32(PFC_DRVCTRL18); in pfc_init_g2h()
1171 reg = (reg & DRVCTRL18_MASK) | in pfc_init_g2h()
1180 pfc_reg_write(PFC_DRVCTRL18, reg); in pfc_init_g2h()
1182 reg = mmio_read_32(PFC_DRVCTRL19); in pfc_init_g2h()
1183 reg = (reg & DRVCTRL19_MASK) | in pfc_init_g2h()
1192 pfc_reg_write(PFC_DRVCTRL19, reg); in pfc_init_g2h()
1194 reg = mmio_read_32(PFC_DRVCTRL20); in pfc_init_g2h()
1195 reg = (reg & DRVCTRL20_MASK) | in pfc_init_g2h()
1204 pfc_reg_write(PFC_DRVCTRL20, reg); in pfc_init_g2h()
1206 reg = mmio_read_32(PFC_DRVCTRL21); in pfc_init_g2h()
1207 reg = (reg & DRVCTRL21_MASK) | in pfc_init_g2h()
1216 pfc_reg_write(PFC_DRVCTRL21, reg); in pfc_init_g2h()
1218 reg = mmio_read_32(PFC_DRVCTRL22); in pfc_init_g2h()
1219 reg = (reg & DRVCTRL22_MASK) | in pfc_init_g2h()
1228 pfc_reg_write(PFC_DRVCTRL22, reg); in pfc_init_g2h()
1230 reg = mmio_read_32(PFC_DRVCTRL23); in pfc_init_g2h()
1231 reg = (reg & DRVCTRL23_MASK) | in pfc_init_g2h()
1240 pfc_reg_write(PFC_DRVCTRL23, reg); in pfc_init_g2h()
1242 reg = mmio_read_32(PFC_DRVCTRL24); in pfc_init_g2h()
1243 reg = (reg & DRVCTRL24_MASK) | in pfc_init_g2h()
1251 pfc_reg_write(PFC_DRVCTRL24, reg); in pfc_init_g2h()