Lines Matching refs:pos
441 uint16_t pos[8]; in stm32_fmc2_bch_correct() local
471 pos[0] = bchdsr1 & FMC2_BCHDSR1_EBP1_MASK; in stm32_fmc2_bch_correct()
472 pos[1] = (bchdsr1 & FMC2_BCHDSR1_EBP2_MASK) >> FMC2_BCHDSR1_EBP2_SHIFT; in stm32_fmc2_bch_correct()
473 pos[2] = bchdsr2 & FMC2_BCHDSR2_EBP3_MASK; in stm32_fmc2_bch_correct()
474 pos[3] = (bchdsr2 & FMC2_BCHDSR2_EBP4_MASK) >> FMC2_BCHDSR2_EBP4_SHIFT; in stm32_fmc2_bch_correct()
475 pos[4] = bchdsr3 & FMC2_BCHDSR3_EBP5_MASK; in stm32_fmc2_bch_correct()
476 pos[5] = (bchdsr3 & FMC2_BCHDSR3_EBP6_MASK) >> FMC2_BCHDSR3_EBP6_SHIFT; in stm32_fmc2_bch_correct()
477 pos[6] = bchdsr4 & FMC2_BCHDSR4_EBP7_MASK; in stm32_fmc2_bch_correct()
478 pos[7] = (bchdsr4 & FMC2_BCHDSR4_EBP8_MASK) >> FMC2_BCHDSR4_EBP8_SHIFT; in stm32_fmc2_bch_correct()
482 if (pos[i] < (eccsize * 8U)) { in stm32_fmc2_bch_correct()
483 uint8_t bitmask = BIT(pos[i] % 8U); in stm32_fmc2_bch_correct()
484 uint32_t offset = pos[i] / 8U; in stm32_fmc2_bch_correct()