Lines Matching refs:uint32_t
125 uint32_t blkReg; /* current block register cache value */
126 uint32_t cmdReg; /* current command register cache value */
127 uint32_t argReg; /* current argument register cache value */
128 uint32_t cmdIndex; /* current command index */
129 uint32_t cmdStatus; /* current command status, cmd/data compelete */
131 uint32_t ocr; /* operation codition */
132 uint32_t eventList; /* events list */
133 uint32_t blkGapEnable;
135 uint32_t capability; /* controller's capbilities */
136 uint32_t maxCurrent; /* maximum current supported */
137 uint32_t present; /* if card is inserted or removed */
138 uint32_t version; /* SD spec version 1.0 or 2.0 */
139 uint32_t vendor; /* vendor number */
146 uint32_t mode; /* interrupt or polling */
147 uint32_t dma; /* dma enabled or disabled */
148 uint32_t retryLimit; /* command retry limit */
149 uint32_t speedMode; /* speed mode, 0 standard, 1 high speed */
150 uint32_t voltage; /* voltage level */
151 uint32_t blockSize; /* access block size (512 for HC card) */
152 uint32_t dmaBoundary; /* dma address boundary */
153 uint32_t detSignal; /* card det signal src, for test purpose only */
154 uint32_t rdWaiting;
155 uint32_t wakeupOut;
156 uint32_t wakeupIn;
157 uint32_t wakeupInt;
158 uint32_t wfe_retry;
159 uint32_t gapInt;
160 uint32_t readWait;
161 uint32_t led;
169 int32_t chal_sd_start(CHAL_HANDLE *sdHandle, uint32_t mode,
170 uint32_t sdBase, uint32_t hostBase);
171 int32_t chal_sd_config(CHAL_HANDLE *sdHandle, uint32_t speed,
172 uint32_t retry, uint32_t boundary,
173 uint32_t blkSize, uint32_t dma);
175 int32_t chal_sd_set_dma(CHAL_HANDLE *sdHandle, uint32_t mode);
178 int32_t chal_sd_send_cmd(CHAL_HANDLE *sdHandle, uint32_t cmdIndex,
179 uint32_t arg, uint32_t options);
182 uint32_t div_ctrl_setting, uint32_t on);
183 uint32_t chal_sd_freq_2_div_ctrl_setting(uint32_t desired_freq);
185 uint32_t length, int32_t dir);
186 int32_t chal_sd_write_buffer(CHAL_HANDLE *sdHandle, uint32_t length,
188 int32_t chal_sd_read_buffer(CHAL_HANDLE *sdHandle, uint32_t length,
190 int32_t chal_sd_reset_line(CHAL_HANDLE *sdHandle, uint32_t line);
191 int32_t chal_sd_get_response(CHAL_HANDLE *sdHandle, uint32_t *resp);
194 int32_t chal_sd_clear_irq(CHAL_HANDLE *sdHandle, uint32_t mask);
195 uint32_t chal_sd_get_present_status(CHAL_HANDLE *sdHandle);
197 void chal_sd_set_speed(CHAL_HANDLE *sdHandle, uint32_t speed);
198 int32_t chal_sd_check_cap(CHAL_HANDLE *sdHandle, uint32_t cap);
199 void chal_sd_set_irq_signal(CHAL_HANDLE *sdHandle, uint32_t mask,
200 uint32_t state);