Lines Matching refs:uint8_t
91 uint8_t *addr;
103 uint8_t jtg;
104 uint8_t train_cmd;
106 uint8_t nb_param_pages;
107 uint8_t reserved1[17];
109 uint8_t manufacturer[12];
110 uint8_t model[20];
111 uint8_t manufacturer_id;
113 uint8_t reserved2[13];
121 uint8_t num_lun;
122 uint8_t num_addr_cycles;
123 uint8_t bit_per_cell;
126 uint8_t valid_blk_begin;
128 uint8_t nb_prog_page;
129 uint8_t partial_prog_attr;
130 uint8_t nb_ecc_bits;
131 uint8_t plane_addr;
132 uint8_t mplanes_ops;
133 uint8_t ez_nand;
134 uint8_t reserved3[12];
136 uint8_t io_pin_cap_max;
143 uint8_t nvddr_timing_mode;
144 uint8_t nvddr2_timing_mode;
145 uint8_t nvddr_features;
149 uint8_t input_pin_cap_max;
150 uint8_t drv_strength_support;
154 uint8_t reserved4[6];
157 uint8_t vendor[88];