Lines Matching refs:UL
130 #define ARM_DRAM1_BASE UL(0x80000000)
131 #define ARM_DRAM1_SIZE UL(0x80000000)
146 #define ARM_TRUSTED_SRAM_BASE UL(0x02000000)
147 #define ARM_SHARED_RAM_SIZE UL(0x00002000) /* 8 KB */
152 #define PLAT_ARM_TRUSTED_SRAM_SIZE UL(0x00100000) /* 1 MB */
154 #define PLAT_ARM_MAX_BL2_SIZE UL(0x0002d000) /* 180 KB */
156 #define PLAT_ARM_MAX_BL31_SIZE UL(0x00023000) /* 140 KB */
163 #define BL2_SIGNATURE_SIZE UL(0x00001000) /* 4 KB */
178 #define DIPHDA_TOS_FW_CONFIG_SIZE UL(0x00002000) /* 8 KB */
197 #define ARM_NS_SHARED_RAM_SIZE UL(0x00300000) /* 3 MB */
203 #define PLAT_ARM_FIP_BASE UL(0x08131000)
204 #define PLAT_ARM_FIP_MAX_SIZE UL(0x1ff000) /* 1.996 MB */
207 #define PLAT_ARM_NVM_SIZE UL(0x02000000) /* 32 MB */
258 #define ARM_SYS_CNTCTL_BASE UL(0x1a200000)
259 #define ARM_SYS_CNTREAD_BASE UL(0x1a210000)
260 #define ARM_SYS_TIMCTL_BASE UL(0x1a220000)
262 #define SYS_COUNTER_FREQ_IN_TICKS UL(50000000) /* 50MHz */
309 #define PLATFORM_STACK_SIZE UL(0x440)