Lines Matching refs:mmio_write_32
18 mmio_write_32(0xfff350b4, 0xf0002000); in hikey960_clk_init()
20 mmio_write_32(0xfff350bc, 0xfc004c00); in hikey960_clk_init()
32 mmio_write_32(PMC_PPLL3_CTRL0_REG, 0x4904305); in hikey960_enable_ppll3()
33 mmio_write_32(PMC_PPLL3_CTRL1_REG, 0x2300000); in hikey960_enable_ppll3()
34 mmio_write_32(PMC_PPLL3_CTRL1_REG, 0x6300000); in hikey960_enable_ppll3()
44 mmio_write_32(PMC_NOC_POWER_IDLEREQ_REG, pmc_value); in bus_idle_clear()
63 mmio_write_32(CRG_CLKDIV20_REG, 0x00020002); in set_vivobus_power_up()
64 mmio_write_32(CRG_PEREN0_REG, 0x00001000); in set_vivobus_power_up()
70 mmio_write_32(CRG_CLKDIV5_REG, 0x003f000b); in set_dss_power_up()
72 mmio_write_32(CRG_CLKDIV3_REG, 0xf0001000); in set_dss_power_up()
74 mmio_write_32(CRG_CLKDIV5_REG, 0xfc002c00); in set_dss_power_up()
76 mmio_write_32(CRG_PERPWREN_REG, 0x00000020); in set_dss_power_up()
79 mmio_write_32(CRG_PERRSTDIS4_REG, 0x00000010); in set_dss_power_up()
81 mmio_write_32(CRG_CLKDIV18_REG, 0x01400140); in set_dss_power_up()
82 mmio_write_32(CRG_PEREN0_REG, 0x00002000); in set_dss_power_up()
83 mmio_write_32(CRG_PEREN3_REG, 0x0003b000); in set_dss_power_up()
86 mmio_write_32(CRG_PERDIS3_REG, 0x0003b000); in set_dss_power_up()
87 mmio_write_32(CRG_PERDIS0_REG, 0x00002000); in set_dss_power_up()
88 mmio_write_32(CRG_CLKDIV18_REG, 0x01400000); in set_dss_power_up()
91 mmio_write_32(CRG_ISODIS_REG, 0x00000040); in set_dss_power_up()
93 mmio_write_32(CRG_PERRSTDIS4_REG, 0x00000006); in set_dss_power_up()
94 mmio_write_32(CRG_PERRSTDIS3_REG, 0x00000c00); in set_dss_power_up()
96 mmio_write_32(CRG_CLKDIV18_REG, 0x01400140); in set_dss_power_up()
97 mmio_write_32(CRG_PEREN0_REG, 0x00002000); in set_dss_power_up()
98 mmio_write_32(CRG_PEREN3_REG, 0x0003b000); in set_dss_power_up()
102 mmio_write_32(CRG_CLKDIV5_REG, 0x003f0003); in set_dss_power_up()
104 mmio_write_32(CRG_CLKDIV5_REG, 0xfc001400); in set_dss_power_up()
110 mmio_write_32(CRG_CLKDIV20_REG, 0x00040004); in set_vcodec_power_up()
111 mmio_write_32(CRG_PEREN0_REG, 0x00000060); in set_vcodec_power_up()
112 mmio_write_32(CRG_PEREN2_REG, 0x10000000); in set_vcodec_power_up()
114 mmio_write_32(CRG_PERRSTDIS0_REG, 0x00000018); in set_vcodec_power_up()
122 mmio_write_32(CRG_PERPWREN_REG, 0x00000004); in set_vdec_power_up()
125 mmio_write_32(CRG_CLKDIV18_REG, 0x80008000); in set_vdec_power_up()
126 mmio_write_32(CRG_PEREN2_REG, 0x20080000); in set_vdec_power_up()
127 mmio_write_32(CRG_PEREN3_REG, 0x00000800); in set_vdec_power_up()
130 mmio_write_32(CRG_PERDIS3_REG, 0x00000800); in set_vdec_power_up()
131 mmio_write_32(CRG_PERDIS2_REG, 0x20080000); in set_vdec_power_up()
132 mmio_write_32(CRG_CLKDIV18_REG, 0x80000000); in set_vdec_power_up()
135 mmio_write_32(CRG_ISODIS_REG, 0x00000004); in set_vdec_power_up()
137 mmio_write_32(CRG_PERRSTDIS3_REG, 0x00000200); in set_vdec_power_up()
139 mmio_write_32(CRG_CLKDIV18_REG, 0x80008000); in set_vdec_power_up()
140 mmio_write_32(CRG_PEREN2_REG, 0x20080000); in set_vdec_power_up()
141 mmio_write_32(CRG_PEREN3_REG, 0x00000800); in set_vdec_power_up()
149 mmio_write_32(CRG_CLKDIV8_REG, 0x18001000); in set_venc_power_up()
151 mmio_write_32(CRG_CLKDIV8_REG, 0x07c00100); in set_venc_power_up()
153 mmio_write_32(CRG_PERPWREN_REG, 0x00000002); in set_venc_power_up()
156 mmio_write_32(CRG_CLKDIV19_REG, 0x00010001); in set_venc_power_up()
157 mmio_write_32(CRG_PEREN2_REG, 0x40000100); in set_venc_power_up()
158 mmio_write_32(CRG_PEREN3_REG, 0x00000400); in set_venc_power_up()
161 mmio_write_32(CRG_PERDIS3_REG, 0x00000400); in set_venc_power_up()
162 mmio_write_32(CRG_PERDIS2_REG, 0x40000100); in set_venc_power_up()
163 mmio_write_32(CRG_CLKDIV19_REG, 0x00010000); in set_venc_power_up()
166 mmio_write_32(CRG_ISODIS_REG, 0x00000002); in set_venc_power_up()
168 mmio_write_32(CRG_PERRSTDIS3_REG, 0x00000100); in set_venc_power_up()
170 mmio_write_32(CRG_CLKDIV19_REG, 0x00010001); in set_venc_power_up()
171 mmio_write_32(CRG_PEREN2_REG, 0x40000100); in set_venc_power_up()
172 mmio_write_32(CRG_PEREN3_REG, 0x00000400); in set_venc_power_up()
176 mmio_write_32(CRG_CLKDIV8_REG, 0x07c00040); in set_venc_power_up()
182 mmio_write_32(CRG_PERPWREN_REG, 0x00000001); in set_isp_power_up()
185 mmio_write_32(CRG_CLKDIV18_REG, 0x70007000); in set_isp_power_up()
186 mmio_write_32(CRG_CLKDIV20_REG, 0x00100010); in set_isp_power_up()
187 mmio_write_32(CRG_PEREN5_REG, 0x01000010); in set_isp_power_up()
188 mmio_write_32(CRG_PEREN3_REG, 0x0bf00000); in set_isp_power_up()
191 mmio_write_32(CRG_PERDIS5_REG, 0x01000010); in set_isp_power_up()
192 mmio_write_32(CRG_PERDIS3_REG, 0x0bf00000); in set_isp_power_up()
193 mmio_write_32(CRG_CLKDIV18_REG, 0x70000000); in set_isp_power_up()
194 mmio_write_32(CRG_CLKDIV20_REG, 0x00100000); in set_isp_power_up()
197 mmio_write_32(CRG_ISODIS_REG, 0x00000001); in set_isp_power_up()
199 mmio_write_32(CRG_ISP_SEC_RSTDIS_REG, 0x0000002f); in set_isp_power_up()
201 mmio_write_32(CRG_CLKDIV18_REG, 0x70007000); in set_isp_power_up()
202 mmio_write_32(CRG_CLKDIV20_REG, 0x00100010); in set_isp_power_up()
203 mmio_write_32(CRG_PEREN5_REG, 0x01000010); in set_isp_power_up()
204 mmio_write_32(CRG_PEREN3_REG, 0x0bf00000); in set_isp_power_up()
208 mmio_write_32(CRG_PEREN3_REG, 0x00700000); in set_isp_power_up()
214 mmio_write_32(CRG_CLKDIV0_REG, 0xc0000000); in set_ivp_power_up()
216 mmio_write_32(CRG_CLKDIV0_REG, 0x3c001400); in set_ivp_power_up()
218 mmio_write_32(CRG_PERPWREN_REG, 0x00200000); in set_ivp_power_up()
221 mmio_write_32(CRG_IVP_SEC_RSTDIS_REG, 0x00000001); in set_ivp_power_up()
223 mmio_write_32(CRG_CLKDIV20_REG, 0x02000200); in set_ivp_power_up()
224 mmio_write_32(CRG_PEREN4_REG, 0x000000a8); in set_ivp_power_up()
227 mmio_write_32(CRG_PERDIS4_REG, 0x000000a8); in set_ivp_power_up()
228 mmio_write_32(CRG_CLKDIV20_REG, 0x02000000); in set_ivp_power_up()
231 mmio_write_32(CRG_ISODIS_REG, 0x01000000); in set_ivp_power_up()
233 mmio_write_32(CRG_IVP_SEC_RSTDIS_REG, 0x00000002); in set_ivp_power_up()
235 mmio_write_32(CRG_CLKDIV20_REG, 0x02000200); in set_ivp_power_up()
236 mmio_write_32(CRG_PEREN4_REG, 0x000000a8); in set_ivp_power_up()
240 mmio_write_32(CRG_CLKDIV0_REG, 0x3c000800); in set_ivp_power_up()
248 mmio_write_32(SCTRL_SCPWREN_REG, 0x00000001); in set_audio_power_up()
251 mmio_write_32(CRG_CLKDIV19_REG, 0x80108010); in set_audio_power_up()
252 mmio_write_32(SCTRL_SCCLKDIV2_REG, 0x00010001); in set_audio_power_up()
253 mmio_write_32(SCTRL_SCPEREN0_REG, 0x0c000000); in set_audio_power_up()
254 mmio_write_32(CRG_PEREN0_REG, 0x04000000); in set_audio_power_up()
255 mmio_write_32(CRG_PEREN5_REG, 0x00000080); in set_audio_power_up()
256 mmio_write_32(SCTRL_SCPEREN1_REG, 0x0000000f); in set_audio_power_up()
259 mmio_write_32(SCTRL_SCPERDIS1_REG, 0x0000000f); in set_audio_power_up()
260 mmio_write_32(SCTRL_SCPERDIS0_REG, 0x0c000000); in set_audio_power_up()
261 mmio_write_32(CRG_PERDIS5_REG, 0x00000080); in set_audio_power_up()
262 mmio_write_32(CRG_PERDIS0_REG, 0x04000000); in set_audio_power_up()
263 mmio_write_32(SCTRL_SCCLKDIV2_REG, 0x00010000); in set_audio_power_up()
264 mmio_write_32(CRG_CLKDIV19_REG, 0x80100000); in set_audio_power_up()
267 mmio_write_32(SCTRL_SCISODIS_REG, 0x00000001); in set_audio_power_up()
270 mmio_write_32(SCTRL_PERRSTDIS1_SEC_REG, 0x00000001); in set_audio_power_up()
271 mmio_write_32(SCTRL_SCPERRSTDIS0_REG, 0x00000780); in set_audio_power_up()
273 mmio_write_32(CRG_CLKDIV19_REG, 0x80108010); in set_audio_power_up()
274 mmio_write_32(SCTRL_SCCLKDIV2_REG, 0x00010001); in set_audio_power_up()
275 mmio_write_32(SCTRL_SCPEREN0_REG, 0x0c000000); in set_audio_power_up()
276 mmio_write_32(CRG_PEREN0_REG, 0x04000000); in set_audio_power_up()
277 mmio_write_32(CRG_PEREN5_REG, 0x00000080); in set_audio_power_up()
278 mmio_write_32(SCTRL_SCPEREN1_REG, 0x0000000f); in set_audio_power_up()
280 mmio_write_32(SCTRL_SCPERCTRL7_REG, 0x00040000); in set_audio_power_up()
292 mmio_write_32(ASP_CFG_MMBUF_CTRL_REG, 0x00ff0000); in set_audio_power_up()
298 mmio_write_32(SCTRL_SCPWREN_REG, 0x00000010); in set_pcie_power_up()
301 mmio_write_32(SCTRL_SCCLKDIV6_REG, 0x08000800); in set_pcie_power_up()
302 mmio_write_32(SCTRL_SCPEREN2_REG, 0x00104000); in set_pcie_power_up()
303 mmio_write_32(CRG_PEREN7_REG, 0x000003a0); in set_pcie_power_up()
306 mmio_write_32(SCTRL_SCPERDIS2_REG, 0x00104000); in set_pcie_power_up()
307 mmio_write_32(CRG_PERDIS7_REG, 0x000003a0); in set_pcie_power_up()
308 mmio_write_32(SCTRL_SCCLKDIV6_REG, 0x08000000); in set_pcie_power_up()
311 mmio_write_32(SCTRL_SCISODIS_REG, 0x00000030); in set_pcie_power_up()
313 mmio_write_32(CRG_PERRSTDIS3_REG, 0x8c000000); in set_pcie_power_up()
315 mmio_write_32(SCTRL_SCCLKDIV6_REG, 0x08000800); in set_pcie_power_up()
316 mmio_write_32(SCTRL_SCPEREN2_REG, 0x00104000); in set_pcie_power_up()
317 mmio_write_32(CRG_PEREN7_REG, 0x000003a0); in set_pcie_power_up()
323 mmio_write_32(0xfff35000, 0x00000008); in ispfunc_enable()
324 mmio_write_32(0xfff35460, 0xc004ffff); in ispfunc_enable()
325 mmio_write_32(0xfff35030, 0x02000000); in ispfunc_enable()
337 mmio_write_32(0xe8420364, ret); in isps_control_clock()
341 mmio_write_32(0xe8420364, ret); in isps_control_clock()
351 mmio_write_32(0xe8420374, 0x00000001); in set_isp_srt_power_up()
352 mmio_write_32(0xe8420350, 0x00000000); in set_isp_srt_power_up()
353 mmio_write_32(0xe8420358, 0x00000000); in set_isp_srt_power_up()
355 mmio_write_32(0xfff35150, 0x00400000); in set_isp_srt_power_up()
363 mmio_write_32(0xfff35148, 0x08000000); in set_isp_srt_power_up()
367 mmio_write_32(0xe8420374, ret); in set_isp_srt_power_up()
371 mmio_write_32(0xe8420010, ~0); in set_isp_srt_power_up()
389 mmio_write_32(0xe8583800, 0x7); in hikey960_regulator_enable()
391 mmio_write_32(0xe8583804, 0xf); in hikey960_regulator_enable()
396 mmio_write_32(TZC_EN0_REG, 0x7fbff066); in hikey960_tzc_init()
397 mmio_write_32(TZC_EN1_REG, 0xfffff5fc); in hikey960_tzc_init()
398 mmio_write_32(TZC_EN2_REG, 0x0007005c); in hikey960_tzc_init()
399 mmio_write_32(TZC_EN3_REG, 0x37030700); in hikey960_tzc_init()
400 mmio_write_32(TZC_EN4_REG, 0xf63fefae); in hikey960_tzc_init()
401 mmio_write_32(TZC_EN5_REG, 0x000410fd); in hikey960_tzc_init()
402 mmio_write_32(TZC_EN6_REG, 0x0063ff68); in hikey960_tzc_init()
403 mmio_write_32(TZC_EN7_REG, 0x030000f3); in hikey960_tzc_init()
404 mmio_write_32(TZC_EN8_REG, 0x00000007); in hikey960_tzc_init()
421 mmio_write_32(IOMG_FIX_006_REG, 0); in hikey960_pinmux_init()
423 mmio_write_32(IOMG_FIX_007_REG, 0); in hikey960_pinmux_init()
425 mmio_write_32(IOMG_AO_011_REG, 0); in hikey960_pinmux_init()
427 mmio_write_32(IOMG_AO_012_REG, 0); in hikey960_pinmux_init()
429 mmio_write_32(IOMG_044_REG, 0); in hikey960_pinmux_init()
431 mmio_write_32(IOMG_AO_023_REG, 0); in hikey960_pinmux_init()
433 mmio_write_32(IOMG_AO_026_REG, 0); in hikey960_pinmux_init()
435 mmio_write_32(IOMG_AO_039_REG, 0); in hikey960_pinmux_init()
436 mmio_write_32(IOCG_AO_043_REG, 1 << 0); in hikey960_pinmux_init()
439 mmio_write_32(IOCG_006_REG, 2 << 4); in hikey960_pinmux_init()
441 mmio_write_32(IOMG_AO_033_REG, 1); in hikey960_pinmux_init()