Lines Matching refs:mmio_write_32
31 mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_A53 + i * 4, ~0x0); in imx_gpc_init()
32 mmio_write_32(IMX_GPC_BASE + IMR1_CORE1_A53 + i * 4, ~0x0); in imx_gpc_init()
33 mmio_write_32(IMX_GPC_BASE + IMR1_CORE2_A53 + i * 4, ~0x0); in imx_gpc_init()
34 mmio_write_32(IMX_GPC_BASE + IMR1_CORE3_A53 + i * 4, ~0x0); in imx_gpc_init()
35 mmio_write_32(IMX_GPC_BASE + IMR1_CORE0_M4 + i * 4, ~0x0); in imx_gpc_init()
43 mmio_write_32(IMX_GPC_BASE + LPCR_A53_BSC, val); in imx_gpc_init()
50 mmio_write_32(IMX_GPC_BASE + PGC_CPU_0_1_MAPPING, 0xffff); in imx_gpc_init()
59 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(0) + 0x4, 0x401); in imx_gpc_init()
60 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(1) + 0x4, 0x401); in imx_gpc_init()
61 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(2) + 0x4, 0x401); in imx_gpc_init()
62 mmio_write_32(IMX_GPC_BASE + COREx_PGC_PCR(3) + 0x4, 0x401); in imx_gpc_init()
63 mmio_write_32(IMX_GPC_BASE + PLAT_PGC_PCR + 0x4, 0x401); in imx_gpc_init()
64 mmio_write_32(IMX_GPC_BASE + PGC_SCU_TIMING, in imx_gpc_init()
68 mmio_write_32(IMX_GPC_BASE + PGC_ACK_SEL_A53, in imx_gpc_init()
81 mmio_write_32(IMX_GPC_BASE + SLPCR, val); in imx_gpc_init()
92 mmio_write_32(IMX_CCM_BASE + CCGR(i), 0x3); in imx_gpc_init()
93 mmio_write_32(IMX_GPC_BASE + PU_PGC_UP_TRG, 0x485); in imx_gpc_init()