Lines Matching refs:BIT
37 #define MASK_DSM_TRIGGER_A53 BIT(31)
38 #define IRQ_SRC_A53_WUP BIT(30)
40 #define IRQ_SRC_C1 BIT(29)
41 #define IRQ_SRC_C0 BIT(28)
42 #define IRQ_SRC_C3 BIT(23)
43 #define IRQ_SRC_C2 BIT(22)
44 #define CPU_CLOCK_ON_LPM BIT(14)
45 #define A53_CLK_ON_LPM BIT(14)
46 #define MASTER0_LPM_HSK BIT(6)
47 #define MASTER1_LPM_HSK BIT(7)
48 #define MASTER2_LPM_HSK BIT(8)
50 #define L2PGE BIT(31)
51 #define EN_L2_WFI_PDN BIT(5)
52 #define EN_PLAT_PDN BIT(4)
54 #define SLPCR_EN_DSM BIT(31)
55 #define SLPCR_RBC_EN BIT(30)
56 #define SLPCR_A53_FASTWUP_STOP_MODE BIT(17)
57 #define SLPCR_A53_FASTWUP_WAIT_MODE BIT(16)
58 #define SLPCR_VSTBY BIT(2)
59 #define SLPCR_SBYOS BIT(1)
60 #define SLPCR_BYPASS_PMIC_READY BIT(0)
64 #define A53_DUMMY_PDN_ACK BIT(15)
65 #define A53_DUMMY_PUP_ACK BIT(31)
66 #define A53_PLAT_PDN_ACK BIT(2)
67 #define A53_PLAT_PUP_ACK BIT(18)
68 #define NOC_PDN_SLT_CTRL BIT(10)
69 #define NOC_PUP_SLT_CTRL BIT(11)
70 #define NOC_PGC_PDN_ACK BIT(3)
71 #define NOC_PGC_PUP_ACK BIT(19)
73 #define DDRMIX_PWR_REQ BIT(5)
74 #define DDRMIX_ADB400_SYNC BIT(1)
75 #define DDRMIX_ADB400_ACK BIT(18)
78 #define PLAT_PUP_SLT_CTRL BIT(9)
79 #define PLAT_PDN_SLT_CTRL BIT(8)
81 #define SLT_PLAT_PDN BIT(8)
82 #define SLT_PLAT_PUP BIT(9)
84 #define MASTER1_MAPPING BIT(1)
85 #define MASTER2_MAPPING BIT(2)