Lines Matching refs:mmio_write_32
96 mmio_write_32(SPM_POWERON_CONFIG_SET, SPM_REGWR_CFG_KEY | SPM_REGWR_EN); in spm_register_init()
98 mmio_write_32(SPM_POWER_ON_VAL0, 0); in spm_register_init()
99 mmio_write_32(SPM_POWER_ON_VAL1, POWER_ON_VAL1_DEF); in spm_register_init()
100 mmio_write_32(SPM_PCM_PWR_IO_EN, 0); in spm_register_init()
102 mmio_write_32(SPM_PCM_CON0, CON0_CFG_KEY | CON0_PCM_SW_RESET); in spm_register_init()
103 mmio_write_32(SPM_PCM_CON0, CON0_CFG_KEY); in spm_register_init()
107 mmio_write_32(SPM_PCM_CON0, CON0_CFG_KEY | CON0_IM_SLEEP_DVS); in spm_register_init()
108 mmio_write_32(SPM_PCM_CON1, CON1_CFG_KEY | CON1_EVENT_LOCK_EN | in spm_register_init()
110 mmio_write_32(SPM_PCM_IM_PTR, 0); in spm_register_init()
111 mmio_write_32(SPM_PCM_IM_LEN, 0); in spm_register_init()
113 mmio_write_32(SPM_CLK_CON, CC_SYSCLK0_EN_1 | CC_SYSCLK0_EN_0 | in spm_register_init()
117 mmio_write_32(SPM_SLEEP_ISR_MASK, 0xff0c); in spm_register_init()
118 mmio_write_32(SPM_SLEEP_ISR_STATUS, 0xc); in spm_register_init()
119 mmio_write_32(SPM_PCM_SW_INT_CLEAR, 0xff); in spm_register_init()
120 mmio_write_32(SPM_MD32_SRAM_CON, 0xff0); in spm_register_init()
128 mmio_write_32(SPM_PCM_CON0, CON0_CFG_KEY | CON0_PCM_SW_RESET); in spm_reset_and_init_pcm()
129 mmio_write_32(SPM_PCM_CON0, CON0_CFG_KEY); in spm_reset_and_init_pcm()
139 mmio_write_32(SPM_PCM_CON0, CON0_CFG_KEY | CON0_IM_SLEEP_DVS); in spm_reset_and_init_pcm()
143 mmio_write_32(SPM_PCM_CON1, con1 | CON1_CFG_KEY | CON1_EVENT_LOCK_EN | in spm_reset_and_init_pcm()
150 mmio_write_32(SPM_PCM_REG_DATA_INI, mmio_read_32(SPM_POWER_ON_VAL0)); in spm_init_pcm_register()
151 mmio_write_32(SPM_PCM_PWR_IO_EN, PCM_RF_SYNC_R0); in spm_init_pcm_register()
152 mmio_write_32(SPM_PCM_PWR_IO_EN, 0); in spm_init_pcm_register()
154 mmio_write_32(SPM_PCM_REG_DATA_INI, mmio_read_32(SPM_POWER_ON_VAL1)); in spm_init_pcm_register()
155 mmio_write_32(SPM_PCM_PWR_IO_EN, PCM_RF_SYNC_R7); in spm_init_pcm_register()
156 mmio_write_32(SPM_PCM_PWR_IO_EN, 0); in spm_init_pcm_register()
161 mmio_write_32(SPM_AP_STANBY_CON, (!pwrctrl->md32_req_mask << 21) | in spm_set_power_control()
168 mmio_write_32(SPM_PCM_SRC_REQ, (!!pwrctrl->pcm_apsrc_req << 0)); in spm_set_power_control()
169 mmio_write_32(SPM_PCM_PASR_DPD_2, 0); in spm_set_power_control()
174 mmio_write_32(SPM_SLEEP_CA15_WFI0_EN, !!pwrctrl->ca15_wfi0_en); in spm_set_power_control()
175 mmio_write_32(SPM_SLEEP_CA15_WFI1_EN, !!pwrctrl->ca15_wfi1_en); in spm_set_power_control()
176 mmio_write_32(SPM_SLEEP_CA15_WFI2_EN, !!pwrctrl->ca15_wfi2_en); in spm_set_power_control()
177 mmio_write_32(SPM_SLEEP_CA15_WFI3_EN, !!pwrctrl->ca15_wfi3_en); in spm_set_power_control()
178 mmio_write_32(SPM_SLEEP_CA7_WFI0_EN, !!pwrctrl->ca7_wfi0_en); in spm_set_power_control()
179 mmio_write_32(SPM_SLEEP_CA7_WFI1_EN, !!pwrctrl->ca7_wfi1_en); in spm_set_power_control()
180 mmio_write_32(SPM_SLEEP_CA7_WFI2_EN, !!pwrctrl->ca7_wfi2_en); in spm_set_power_control()
181 mmio_write_32(SPM_SLEEP_CA7_WFI3_EN, !!pwrctrl->ca7_wfi3_en); in spm_set_power_control()
193 mmio_write_32(SPM_PCM_TIMER_VAL, val); in spm_set_wakeup_event()
204 mmio_write_32(SPM_SLEEP_WAKEUP_EVENT_MASK, ~mask); in spm_set_wakeup_event()
205 mmio_write_32(SPM_SLEEP_ISR_MASK, 0xfe04); in spm_set_wakeup_event()
225 mmio_write_32(SPM_PCM_EVENT_VECTOR0, pcmdesc->vec0); in spm_init_event_vector()
226 mmio_write_32(SPM_PCM_EVENT_VECTOR1, pcmdesc->vec1); in spm_init_event_vector()
227 mmio_write_32(SPM_PCM_EVENT_VECTOR2, pcmdesc->vec2); in spm_init_event_vector()
228 mmio_write_32(SPM_PCM_EVENT_VECTOR3, pcmdesc->vec3); in spm_init_event_vector()
229 mmio_write_32(SPM_PCM_EVENT_VECTOR4, pcmdesc->vec4); in spm_init_event_vector()
230 mmio_write_32(SPM_PCM_EVENT_VECTOR5, pcmdesc->vec5); in spm_init_event_vector()
231 mmio_write_32(SPM_PCM_EVENT_VECTOR6, pcmdesc->vec6); in spm_init_event_vector()
232 mmio_write_32(SPM_PCM_EVENT_VECTOR7, pcmdesc->vec7); in spm_init_event_vector()
246 mmio_write_32(SPM_PCM_IM_PTR, ptr); in spm_kick_im_to_fetch()
247 mmio_write_32(SPM_PCM_IM_LEN, len); in spm_kick_im_to_fetch()
254 mmio_write_32(SPM_PCM_CON0, con0 | CON0_CFG_KEY | CON0_IM_KICK); in spm_kick_im_to_fetch()
255 mmio_write_32(SPM_PCM_CON0, con0 | CON0_CFG_KEY); in spm_kick_im_to_fetch()
259 mmio_write_32(SPM_PCM_CON0, con0 | CON0_CFG_KEY | CON0_PCM_KICK); in spm_kick_im_to_fetch()
260 mmio_write_32(SPM_PCM_CON0, con0 | CON0_CFG_KEY); in spm_kick_im_to_fetch()
265 mmio_write_32(SPM_CLK_SETTLE, SPM_SYSCLK_SETTLE); in spm_set_sysclk_settle()
277 mmio_write_32(SPM_PCM_CON1, CON1_CFG_KEY | con1); in spm_kick_pcm_to_run()
280 mmio_write_32(SPM_PCM_TIMER_VAL, PCM_TIMER_MAX); in spm_kick_pcm_to_run()
282 mmio_write_32(SPM_PCM_WDT_TIMER_VAL, in spm_kick_pcm_to_run()
285 mmio_write_32(SPM_PCM_CON1, con1 | CON1_CFG_KEY | CON1_PCM_WDT_EN); in spm_kick_pcm_to_run()
286 mmio_write_32(SPM_PCM_PASR_DPD_0, 0); in spm_kick_pcm_to_run()
288 mmio_write_32(SPM_PCM_MAS_PAUSE_MASK, 0xffffffff); in spm_kick_pcm_to_run()
289 mmio_write_32(SPM_PCM_REG_DATA_INI, 0); in spm_kick_pcm_to_run()
292 mmio_write_32(SPM_PCM_FLAGS, pwrctrl->pcm_flags); in spm_kick_pcm_to_run()
297 mmio_write_32(SPM_PCM_PWR_IO_EN, in spm_kick_pcm_to_run()
306 mmio_write_32(SPM_PCM_PWR_IO_EN, 0); in spm_clean_after_wakeup()
307 mmio_write_32(SPM_SLEEP_CPU_WAKEUP_EVENT, 0); in spm_clean_after_wakeup()
310 mmio_write_32(SPM_SLEEP_WAKEUP_EVENT_MASK, ~0); in spm_clean_after_wakeup()
311 mmio_write_32(SPM_SLEEP_ISR_MASK, 0xFF0C); in spm_clean_after_wakeup()
312 mmio_write_32(SPM_SLEEP_ISR_STATUS, 0xC); in spm_clean_after_wakeup()
313 mmio_write_32(SPM_PCM_SW_INT_CLEAR, 0xFF); in spm_clean_after_wakeup()
361 mmio_write_32(DEVAPC0_APC_CON, 0x0); in spm_boot_init()
362 mmio_write_32(DEVAPC0_MAS_SEC_0, 0x200); in spm_boot_init()
365 mmio_write_32(SPM_PCM_RESERVE, 0xFE); in spm_boot_init()