Lines Matching refs:mmio_read_32
46 if ((mmio_read_32(cci_base_addr + FLUSH_SF) & 0x1) == 0x0) in mcsi_cache_flush()
85 support_ability = mmio_read_32(slave_base); in cci_enable_cluster_coherency()
87 pending = (mmio_read_32( in cci_enable_cluster_coherency()
90 pending = (mmio_read_32( in cci_enable_cluster_coherency()
102 while (mmio_read_32(cci_base_addr + SNP_PENDING_REG) >> SNP_PENDING) in cci_enable_cluster_coherency()
118 while (mmio_read_32(cci_base_addr + SNP_PENDING_REG) >> SNP_PENDING) in cci_disable_cluster_coherency()
121 config = mmio_read_32(slave_base); in cci_disable_cluster_coherency()
132 while (mmio_read_32(cci_base_addr + SNP_PENDING_REG) >> SNP_PENDING) in cci_disable_cluster_coherency()
140 config = mmio_read_32(cci_base_addr + CENTRAL_CTRL_REG); in cci_secure_switch()
152 config = mmio_read_32(cci_base_addr + CENTRAL_CTRL_REG); in cci_pmu_secure_switch()
162 while (mmio_read_32(cci_base_addr + SNP_PENDING_REG) >> SNP_PENDING) in cci_init_sf()
166 while (mmio_read_32(cci_base_addr + SF_INIT_REG) & TRIG_SF1_INIT) in cci_init_sf()
168 while (!(mmio_read_32(cci_base_addr + SF_INIT_REG) & SF1_INIT_DONE)) in cci_init_sf()
172 while (mmio_read_32(cci_base_addr + SF_INIT_REG) & TRIG_SF2_INIT) in cci_init_sf()
174 while (!(mmio_read_32(cci_base_addr + SF_INIT_REG) & SF2_INIT_DONE)) in cci_init_sf()
193 ret = mmio_read_32(cci_base_addr + offset); in cci_reg_access()