Lines Matching refs:TEGRA_FLOWCTRL_BASE
27 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU0_CSR),
28 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR),
29 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR + 8),
30 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CPU1_CSR + 16)
34 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU0_EVENTS),
35 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU1_EVENTS),
36 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU1_EVENTS + 8),
37 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_HALT_CPU1_EVENTS + 16)
41 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL),
42 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL + 4),
43 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL + 8),
44 (TEGRA_FLOWCTRL_BASE + FLOWCTRL_CC4_CORE0_CTRL + 12)