Lines Matching refs:x2
108 mov x2, x0
115 tst x0, x2
207 ldr x2, =NXP_DCFG_ADDR
211 str w1, [x2, #DCFG_BOOTLOCPTRL_OFFSET]
215 str w1, [x2, #DCFG_BOOTLOCPTRH_OFFSET]
256 mov x2, #1
257 lsl x2, x2, x1
262 orr x2, x2, x1
265 orr x2, x2, #ICC_SGI0R_EL1_INTID
268 msr ICC_SGI0R_EL1, x2
420 mrs x2, ICC_IAR0_EL1
422 cmp x2, x3
426 msr ICC_EOIR0_EL1, x2
521 mov x2, #NXP_RESET_ADDR
522 add x2, x2, x4
523 dc cvac, x2
547 ldr x2, =NXP_DCFG_ADDR
550 str w1, [x2, x0]
553 str w1, [x2, x0]
612 mov x2, #DAIF_SET_MASK
614 orr x1, x1, x2
618 orr x1, x1, x2
696 ldr x2, =NXP_TIMER_ADDR
697 ldr w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
701 str w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
780 ldr x2, =NXP_TIMER_ADDR
781 ldr w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
785 str w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
877 ldr x2, =NXP_EPU_ADDR
878 ldr w4, [x2, #EPU_EPIMCR10_OFFSET]
879 ldr w5, [x2, #EPU_EPCCR10_OFFSET]
880 ldr w6, [x2, #EPU_EPCTR10_OFFSET]
881 ldr w7, [x2, #EPU_EPGCR_OFFSET]
895 str w4, [x2, #EPU_EPIMCR10_OFFSET]
896 str w5, [x2, #EPU_EPCCR10_OFFSET]
897 str w6, [x2, #EPU_EPCTR10_OFFSET]
898 str w7, [x2, #EPU_EPGCR_OFFSET]
900 ldr x2, =NXP_GICD_ADDR
910 ldr w4, [x2, x0]
911 ldr w5, [x2, x1]
914 ldr w6, [x2, x0]
915 ldr w7, [x2, x1]
928 str w4, [x2, x0]
929 str w4, [x2, x1]
932 str w4, [x2, x0]
933 str w4, [x2, x1]
940 ldr x2, =NXP_DCFG_ADDR
943 str w1, [x2, x0]
947 str w1, [x2, x0]
1104 ldr x2, =NXP_DCFG_ADDR
1105 str wzr, [x2, #DCFG_DEVDISR1_OFFSET]
1106 str wzr, [x2, #DCFG_DEVDISR2_OFFSET]
1107 str wzr, [x2, #DCFG_DEVDISR4_OFFSET]
1111 ldp x0, x2, [sp], #16
1116 ldp x0, x2, [sp], #16
1124 ldp x0, x2, [sp], #16
1127 ldp x2, x1, [sp], #16
1277 ldr x2, =NXP_DCFG_ADDR
1278 str w1, [x2, x0]
1288 ldr x2, =NXP_DCFG_ADDR
1289 ldr w1, [x2, x0]
1335 cbz x2, 1f
1337 sub x2, x2, #1
1360 cbz x2, 1f
1362 sub x2, x2, #1
1374 ldr x2, =NXP_RESET_ADDR
1375 str w1, [x2, x0]