Lines Matching refs:x2
127 mov x2, x0 /* x2 = core mask */
133 tst x0, x2
187 ldr x2, =NXP_DCFG_ADDR
191 str w1, [x2, #DCFG_BOOTLOCPTRL_OFFSET]
195 str w1, [x2, #DCFG_BOOTLOCPTRH_OFFSET]
292 mov x2, #1
293 lsl x2, x2, x1
298 orr x2, x2, x1
301 orr x2, x2, #ICC_SGI0R_EL1_INTID
304 msr ICC_SGI0R_EL1, x2
451 mrs x2, ICC_IAR0_EL1
453 cmp x2, x3
457 msr ICC_EOIR0_EL1, x2
533 ldr x2, =NXP_RST_ADDR
537 str w0, [x2, #RSTCNTL_OFFSET]
541 str w0, [x2, #RSTCNTL_OFFSET]
546 add x2, x2, #RSTCNTL_OFFSET
547 dc cvac, x2
575 ldr x2, =NXP_DCFG_ADDR
578 str w1, [x2, x0]
581 str w1, [x2, x0]
584 str w1, [x2, x0]
643 mov x2, #DAIF_SET_MASK
645 orr x1, x1, x2
649 orr x1, x1, x2
729 ldr x2, =NXP_TIMER_ADDR
730 ldr w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
734 str w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
819 ldr x2, =NXP_TIMER_ADDR
820 ldr w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
824 str w0, [x2, #SYS_COUNTER_CNTCR_OFFSET]
931 ldr x2, =NXP_PMU_DCSR_ADDR
936 str w4, [x2, x3]
1328 str w9, [x2, x8]
1365 mov x2, #CPUECTLR_RET_8CLK
1366 bic x1, x1, x2
1368 mov x2, #CPUECTLR_DISABLE_TWALK_PREFETCH
1369 bic x1, x1, x2
1599 mov x2, #CORE_DISABLED
1615 mov x2, #CORE_DISABLED
1704 ldr x2, =NXP_DCFG_ADDR
1705 str w1, [x2, x0]
1716 ldr x2, =NXP_DCFG_ADDR
1717 ldr w1, [x2, x0]
1769 cbz x2, 1f
1771 sub x2, x2, #1
1795 cbz x2, 1f /* x2 = core number */
1797 sub x2, x2, #1
1809 ldr x2, =NXP_RESET_ADDR
1810 str w1, [x2, x0]