Lines Matching refs:regs

19 	struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;  in mxs_lradc_init()  local
23 	writel(LRADC_CTRL0_SFTRST, &regs->hw_lradc_ctrl0_clr);  in mxs_lradc_init()
24 	writel(LRADC_CTRL0_CLKGATE, &regs->hw_lradc_ctrl0_clr);  in mxs_lradc_init()
25 	writel(LRADC_CTRL0_ONCHIP_GROUNDREF, &regs->hw_lradc_ctrl0_clr);  in mxs_lradc_init()
27 	clrsetbits_le32(&regs->hw_lradc_ctrl3,  in mxs_lradc_init()
31 	clrsetbits_le32(&regs->hw_lradc_ctrl4,  in mxs_lradc_init()
40 	struct mxs_lradc_regs *regs = (struct mxs_lradc_regs *)MXS_LRADC_BASE;  in mxs_lradc_enable_batt_measurement()  local
45 	if (!(readl(&regs->hw_lradc_status) & LRADC_STATUS_CHANNEL7_PRESENT)) {  in mxs_lradc_enable_batt_measurement()
52 	writel(LRADC_CTRL1_LRADC7_IRQ_EN, &regs->hw_lradc_ctrl1_clr);  in mxs_lradc_enable_batt_measurement()
53 	writel(LRADC_CTRL1_LRADC7_IRQ, &regs->hw_lradc_ctrl1_clr);  in mxs_lradc_enable_batt_measurement()
55 	clrsetbits_le32(&regs->hw_lradc_conversion,  in mxs_lradc_enable_batt_measurement()
58 	writel(LRADC_CONVERSION_AUTOMATIC, &regs->hw_lradc_conversion_set);  in mxs_lradc_enable_batt_measurement()
62 		&regs->hw_lradc_ctrl2_clr);  in mxs_lradc_enable_batt_measurement()
63 	writel(0xffffffff, &regs->hw_lradc_ch7_clr);  in mxs_lradc_enable_batt_measurement()
64 	clrbits_le32(&regs->hw_lradc_ch7, LRADC_CH_NUM_SAMPLES_MASK);  in mxs_lradc_enable_batt_measurement()
65 	writel(LRADC_CH_ACCUMULATE, &regs->hw_lradc_ch7_clr);  in mxs_lradc_enable_batt_measurement()
68 	writel(1 << 7, &regs->hw_lradc_ctrl0_set);  in mxs_lradc_enable_batt_measurement()
73 		100, &regs->hw_lradc_delay3);  in mxs_lradc_enable_batt_measurement()
75 	writel(0xffffffff, &regs->hw_lradc_ch7_clr);  in mxs_lradc_enable_batt_measurement()
76 	writel(LRADC_DELAY_KICK, &regs->hw_lradc_delay3_set);  in mxs_lradc_enable_batt_measurement()