Lines Matching refs:stv0991_creg
12 static struct stv0991_creg *const stv0991_creg = \ variable
13 (struct stv0991_creg *)CREG_BASE_ADDR;
20 writel((readl(&stv0991_creg->mux12) & GPIOC_31_MUX_MASK) | in stv0991_pinmux_config()
22 &stv0991_creg->mux12); in stv0991_pinmux_config()
23 writel((readl(&stv0991_creg->mux12) & GPIOC_30_MUX_MASK) | in stv0991_pinmux_config()
25 &stv0991_creg->mux12); in stv0991_pinmux_config()
27 writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_31_MODE_MASK) | in stv0991_pinmux_config()
29 &stv0991_creg->cfg_pad6); in stv0991_pinmux_config()
30 writel((readl(&stv0991_creg->cfg_pad6) & GPIOC_30_MODE_MASK) | in stv0991_pinmux_config()
32 &stv0991_creg->cfg_pad6); in stv0991_pinmux_config()
36 writel((readl(&stv0991_creg->mux7) & GPIOB_17_MUX_MASK) | in stv0991_pinmux_config()
38 &stv0991_creg->mux7); in stv0991_pinmux_config()
39 writel((readl(&stv0991_creg->mux7) & GPIOB_16_MUX_MASK) | in stv0991_pinmux_config()
41 &stv0991_creg->mux7); in stv0991_pinmux_config()
44 writel(readl(&stv0991_creg->mux6) & 0x000000FF, in stv0991_pinmux_config()
45 &stv0991_creg->mux6); in stv0991_pinmux_config()
46 writel(0x00000000, &stv0991_creg->mux7); in stv0991_pinmux_config()
47 writel(0x00000000, &stv0991_creg->mux8); in stv0991_pinmux_config()
48 writel(readl(&stv0991_creg->mux9) & 0xFFF00000, in stv0991_pinmux_config()
49 &stv0991_creg->mux9); in stv0991_pinmux_config()
51 writel((readl(&stv0991_creg->vdd_pad1) & VDD_ETH_PS_MASK) | in stv0991_pinmux_config()
52 ETH_VDD_CFG, &stv0991_creg->vdd_pad1); in stv0991_pinmux_config()
53 writel((readl(&stv0991_creg->vdd_pad1) & VDD_ETH_PS_MASK) | in stv0991_pinmux_config()
54 ETH_M_VDD_CFG, &stv0991_creg->vdd_pad1); in stv0991_pinmux_config()
58 writel((readl(&stv0991_creg->mux13) & FLASH_CS_NC_MASK) | in stv0991_pinmux_config()
59 CFG_FLASH_CS_NC, &stv0991_creg->mux13); in stv0991_pinmux_config()
60 writel((readl(&stv0991_creg->mux13) & FLASH_CLK_MASK) | in stv0991_pinmux_config()
61 CFG_FLASH_CLK, &stv0991_creg->mux13); in stv0991_pinmux_config()