Lines Matching refs:bi_dram
537 final_map[index].virt = gd->bd->bi_dram[0].start; in final_mmu_setup()
538 final_map[index].phys = gd->bd->bi_dram[0].start; in final_mmu_setup()
539 final_map[index].size = gd->bd->bi_dram[0].size; in final_mmu_setup()
544 final_map[index].virt = gd->bd->bi_dram[1].start; in final_mmu_setup()
545 final_map[index].phys = gd->bd->bi_dram[1].start; in final_mmu_setup()
546 final_map[index].size = gd->bd->bi_dram[1].size; in final_mmu_setup()
555 final_map[index].virt = gd->bd->bi_dram[2].start; in final_mmu_setup()
556 final_map[index].phys = gd->bd->bi_dram[2].start; in final_mmu_setup()
557 final_map[index].size = gd->bd->bi_dram[2].size; in final_mmu_setup()
1383 gd->bd->bi_dram[i].start = regs.regs[1]; in tfa_dram_init_banksize()
1384 gd->bd->bi_dram[i].size = regs.regs[2]; in tfa_dram_init_banksize()
1386 dram_size -= gd->bd->bi_dram[i].size; in tfa_dram_init_banksize()
1397 if (gd->bd->bi_dram[2].size >= in tfa_dram_init_banksize()
1398 board_reserve_ram_top(gd->bd->bi_dram[2].size)) { in tfa_dram_init_banksize()
1399 gd->arch.resv_ram = gd->bd->bi_dram[2].start + in tfa_dram_init_banksize()
1400 gd->bd->bi_dram[2].size - in tfa_dram_init_banksize()
1401 board_reserve_ram_top(gd->bd->bi_dram[2].size); in tfa_dram_init_banksize()
1405 if (gd->bd->bi_dram[1].size >= in tfa_dram_init_banksize()
1406 board_reserve_ram_top(gd->bd->bi_dram[1].size)) { in tfa_dram_init_banksize()
1407 gd->arch.resv_ram = gd->bd->bi_dram[1].start + in tfa_dram_init_banksize()
1408 gd->bd->bi_dram[1].size - in tfa_dram_init_banksize()
1409 board_reserve_ram_top(gd->bd->bi_dram[1].size); in tfa_dram_init_banksize()
1410 } else if (gd->bd->bi_dram[0].size > in tfa_dram_init_banksize()
1411 board_reserve_ram_top(gd->bd->bi_dram[0].size)) { in tfa_dram_init_banksize()
1412 gd->arch.resv_ram = gd->bd->bi_dram[0].start + in tfa_dram_init_banksize()
1413 gd->bd->bi_dram[0].size - in tfa_dram_init_banksize()
1414 board_reserve_ram_top(gd->bd->bi_dram[0].size); in tfa_dram_init_banksize()
1451 gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; in dram_init_banksize()
1453 gd->bd->bi_dram[0].size = CONFIG_SYS_DDR_BLOCK1_SIZE; in dram_init_banksize()
1454 gd->bd->bi_dram[1].start = CONFIG_SYS_DDR_BLOCK2_BASE; in dram_init_banksize()
1455 gd->bd->bi_dram[1].size = gd->ram_size - in dram_init_banksize()
1458 if (gd->bi_dram[1].size > CONFIG_SYS_DDR_BLOCK2_SIZE) { in dram_init_banksize()
1459 gd->bd->bi_dram[2].start = CONFIG_SYS_DDR_BLOCK3_BASE; in dram_init_banksize()
1460 gd->bd->bi_dram[2].size = gd->bd->bi_dram[1].size - in dram_init_banksize()
1462 gd->bd->bi_dram[1].size = CONFIG_SYS_DDR_BLOCK2_SIZE; in dram_init_banksize()
1466 gd->bd->bi_dram[0].size = gd->ram_size; in dram_init_banksize()
1469 if (gd->bd->bi_dram[0].size > in dram_init_banksize()
1471 gd->bd->bi_dram[0].size -= in dram_init_banksize()
1473 gd->arch.secure_ram = gd->bd->bi_dram[0].start + in dram_init_banksize()
1474 gd->bd->bi_dram[0].size; in dram_init_banksize()
1483 if (gd->bd->bi_dram[2].size >= in dram_init_banksize()
1484 board_reserve_ram_top(gd->bd->bi_dram[2].size)) { in dram_init_banksize()
1485 gd->arch.resv_ram = gd->bd->bi_dram[2].start + in dram_init_banksize()
1486 gd->bd->bi_dram[2].size - in dram_init_banksize()
1487 board_reserve_ram_top(gd->bd->bi_dram[2].size); in dram_init_banksize()
1491 if (gd->bd->bi_dram[1].size >= in dram_init_banksize()
1492 board_reserve_ram_top(gd->bd->bi_dram[1].size)) { in dram_init_banksize()
1493 gd->arch.resv_ram = gd->bd->bi_dram[1].start + in dram_init_banksize()
1494 gd->bd->bi_dram[1].size - in dram_init_banksize()
1495 board_reserve_ram_top(gd->bd->bi_dram[1].size); in dram_init_banksize()
1496 } else if (gd->bd->bi_dram[0].size > in dram_init_banksize()
1497 board_reserve_ram_top(gd->bd->bi_dram[0].size)) { in dram_init_banksize()
1498 gd->arch.resv_ram = gd->bd->bi_dram[0].start + in dram_init_banksize()
1499 gd->bd->bi_dram[0].size - in dram_init_banksize()
1500 board_reserve_ram_top(gd->bd->bi_dram[0].size); in dram_init_banksize()
1522 gd->bd->bi_dram[2].start = CONFIG_SYS_DP_DDR_BASE; in dram_init_banksize()
1523 gd->bd->bi_dram[2].size = dp_ddr_size; in dram_init_banksize()
1554 ram_start = gd->bd->bi_dram[i].start; in efi_add_known_memory()
1555 ram_size = gd->bd->bi_dram[i].size; in efi_add_known_memory()