Lines Matching refs:DRIVE1_02MA
28 writel(DRIVE1_02MA | PULL_UP, &pmx1->iocfg[49]); /* UART0_RXD */ in hi6220_uart_config()
29 writel(DRIVE1_02MA | PULL_UP, &pmx1->iocfg[50]); /* UART0_TXD */ in hi6220_uart_config()
38 writel(DRIVE1_02MA | PULL_UP, &pmx1->iocfg[51]); /*UART1_CTS_N*/ in hi6220_uart_config()
39 writel(DRIVE1_02MA | PULL_UP, &pmx1->iocfg[53]); /* UART1_RXD */ in hi6220_uart_config()
40 writel(DRIVE1_02MA, &pmx1->iocfg[52]); /* UART1_RTS_N */ in hi6220_uart_config()
41 writel(DRIVE1_02MA, &pmx1->iocfg[54]); /* UART1_TXD */ in hi6220_uart_config()
50 writel(DRIVE1_02MA, &pmx1->iocfg[55]); /* UART2_CTS_N */ in hi6220_uart_config()
51 writel(DRIVE1_02MA, &pmx1->iocfg[56]); /* UART2_RTS_N */ in hi6220_uart_config()
52 writel(DRIVE1_02MA, &pmx1->iocfg[57]); /* UART2_RXD */ in hi6220_uart_config()
53 writel(DRIVE1_02MA, &pmx1->iocfg[58]); /* UART2_TXD */ in hi6220_uart_config()
63 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[100]); in hi6220_uart_config()
65 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[101]); in hi6220_uart_config()
67 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[102]); in hi6220_uart_config()
69 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[103]); in hi6220_uart_config()
79 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[120]); in hi6220_uart_config()
81 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[121]); in hi6220_uart_config()
83 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[122]); in hi6220_uart_config()
85 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[123]); in hi6220_uart_config()
92 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[118]); in hi6220_uart_config()
94 writel(DRIVE1_02MA | PULL_DOWN, &pmx1->iocfg[119]); in hi6220_uart_config()