Lines Matching refs:x0
27 reg = <0x0 0x1410000 0 0x10000>, /* GICD */
28 <0x0 0x1420000 0 0x10000>, /* GICC */
29 <0x0 0x1440000 0 0x20000>, /* GICH */
30 <0x0 0x1460000 0 0x20000>; /* GICV */
42 reg = <0x0 0x1ee1000 0x0 0x1000>;
51 reg = <0x0 0x2100000 0x0 0x10000>;
64 reg = <0x0 0x2110000 0x0 0x10000>;
75 reg = <0x0 0x1560000 0x0 0x10000>;
83 reg = <0x0 0x2300000 0x0 0x10000>;
93 reg = <0x0 0x2310000 0x0 0x10000>;
103 reg = <0x0 0x2320000 0x0 0x10000>;
113 reg = <0x0 0x2330000 0x0 0x10000>;
123 reg = <0x0 0x1530000 0x0 0x10000>;
131 reg = <0x0 0x2180000 0x0 0x10000>;
142 reg = <0x0 0x2190000 0x0 0x10000>;
153 reg = <0x0 0x21a0000 0x0 0x10000>;
164 reg = <0x0 0x21b0000 0x0 0x10000>;
173 reg = <0x00 0x21c0500 0x0 0x100>;
180 reg = <0x00 0x21c0600 0x0 0x100>;
187 reg = <0x0 0x21d0500 0x0 0x100>;
194 reg = <0x0 0x21d0600 0x0 0x100>;
201 reg = <0x0 0x2950000 0x0 0x1000>;
210 reg = <0x0 0x2960000 0x0 0x1000>;
219 reg = <0x0 0x2970000 0x0 0x1000>;
228 reg = <0x0 0x2980000 0x0 0x1000>;
237 reg = <0x0 0x2990000 0x0 0x1000>;
246 reg = <0x0 0x29a0000 0x0 0x1000>;
257 reg = <0x0 0x1550000 0x0 0x10000>,
258 <0x0 0x40000000 0x0 0x10000000>;
265 reg = <0x0 0x2f00000 0x0 0x10000>;
272 reg = <0x0 0x3000000 0x0 0x10000>;
279 reg = <0x0 0x3100000 0x0 0x10000>;
286 reg = <0x00 0x03400000 0x0 0x80000 /* dbi registers */
287 0x00 0x03480000 0x0 0x40000 /* lut registers */
288 0x00 0x034c0000 0x0 0x40000 /* pf controls registers */
289 0x40 0x00000000 0x0 0x20000>; /* configuration space */
295 bus-range = <0x0 0xff>;
296 ranges = <0x81000000 0x0 0x00000000 0x40 0x00020000 0x0 0x00010000 /* downstream I/O */
297 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
302 reg = <0x00 0x03400000 0x0 0x80000
303 0x00 0x034c0000 0x0 0x40000
313 reg = <0x00 0x03500000 0x0 0x80000 /* dbi registers */
314 0x00 0x03580000 0x0 0x40000 /* lut registers */
315 0x00 0x035c0000 0x0 0x40000 /* pf controls registers */
316 0x48 0x00000000 0x0 0x20000>; /* configuration space */
323 bus-range = <0x0 0xff>;
324 ranges = <0x81000000 0x0 0x00000000 0x48 0x00020000 0x0 0x00010000 /* downstream I/O */
325 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
330 reg = <0x00 0x03500000 0x0 0x80000
331 0x00 0x035c0000 0x0 0x40000
341 reg = <0x00 0x03600000 0x0 0x80000 /* dbi registers */
342 0x00 0x03680000 0x0 0x40000 /* lut registers */
343 0x00 0x036c0000 0x0 0x40000 /* pf controls registers */
344 0x50 0x00000000 0x0 0x20000>; /* configuration space */
350 bus-range = <0x0 0xff>;
351 ranges = <0x81000000 0x0 0x00000000 0x50 0x00020000 0x0 0x00010000 /* downstream I/O */
352 0x82000000 0x0 0x40000000 0x50 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */
357 reg = <0x00 0x03600000 0x0 0x80000
358 0x00 0x036c0000 0x0 0x40000
368 reg = <0x0 0x3200000 0x0 0x10000 /* ccsr sata base */
369 0x0 0x20140520 0x0 0x4>; /* ecc sata addr*/