Lines Matching refs:cpg
10 #include <dt-bindings/clock/r8a774b1-cpg-mssr.h>
85 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
96 clocks = <&cpg CPG_CORE R8A774B1_CLK_Z>;
159 clocks = <&cpg CPG_MOD 402>;
161 resets = <&cpg 402>;
175 clocks = <&cpg CPG_MOD 912>;
177 resets = <&cpg 912>;
190 clocks = <&cpg CPG_MOD 911>;
192 resets = <&cpg 911>;
205 clocks = <&cpg CPG_MOD 910>;
207 resets = <&cpg 910>;
220 clocks = <&cpg CPG_MOD 909>;
222 resets = <&cpg 909>;
235 clocks = <&cpg CPG_MOD 908>;
237 resets = <&cpg 908>;
250 clocks = <&cpg CPG_MOD 907>;
252 resets = <&cpg 907>;
265 clocks = <&cpg CPG_MOD 906>;
267 resets = <&cpg 906>;
280 clocks = <&cpg CPG_MOD 905>;
282 resets = <&cpg 905>;
296 clocks = <&cpg CPG_MOD 303>;
299 resets = <&cpg 303>;
315 clocks = <&cpg CPG_MOD 302>;
318 resets = <&cpg 302>;
334 clocks = <&cpg CPG_MOD 301>;
337 resets = <&cpg 301>;
353 clocks = <&cpg CPG_MOD 300>;
356 resets = <&cpg 300>;
360 cpg: clock-controller@e6150000 { label
361 compatible = "renesas,r8a774b1-cpg-mssr";
389 clocks = <&cpg CPG_MOD 522>;
391 resets = <&cpg 522>;
406 clocks = <&cpg CPG_MOD 407>;
408 resets = <&cpg 407>;
417 clocks = <&cpg CPG_MOD 125>;
420 resets = <&cpg 125>;
430 clocks = <&cpg CPG_MOD 124>;
433 resets = <&cpg 124>;
443 clocks = <&cpg CPG_MOD 123>;
446 resets = <&cpg 123>;
456 clocks = <&cpg CPG_MOD 122>;
459 resets = <&cpg 122>;
469 clocks = <&cpg CPG_MOD 121>;
472 resets = <&cpg 121>;
483 clocks = <&cpg CPG_MOD 931>;
485 resets = <&cpg 931>;
500 clocks = <&cpg CPG_MOD 930>;
502 resets = <&cpg 930>;
517 clocks = <&cpg CPG_MOD 929>;
519 resets = <&cpg 929>;
534 clocks = <&cpg CPG_MOD 928>;
536 resets = <&cpg 928>;
550 clocks = <&cpg CPG_MOD 927>;
552 resets = <&cpg 927>;
566 clocks = <&cpg CPG_MOD 919>;
568 resets = <&cpg 919>;
582 clocks = <&cpg CPG_MOD 918>;
584 resets = <&cpg 918>;
599 clocks = <&cpg CPG_MOD 926>;
601 resets = <&cpg 926>;
613 clocks = <&cpg CPG_MOD 520>,
614 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
621 resets = <&cpg 520>;
631 clocks = <&cpg CPG_MOD 519>,
632 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
639 resets = <&cpg 519>;
649 clocks = <&cpg CPG_MOD 518>,
650 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
657 resets = <&cpg 518>;
667 clocks = <&cpg CPG_MOD 517>,
668 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
674 resets = <&cpg 517>;
684 clocks = <&cpg CPG_MOD 516>,
685 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
691 resets = <&cpg 516>;
700 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
708 resets = <&cpg 704>, <&cpg 703>;
716 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
722 resets = <&cpg 703>, <&cpg 704>;
734 clocks = <&cpg CPG_MOD 330>;
736 resets = <&cpg 330>;
748 clocks = <&cpg CPG_MOD 331>;
750 resets = <&cpg 331>;
759 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
763 resets = <&cpg 328>;
794 clocks = <&cpg CPG_MOD 219>;
797 resets = <&cpg 219>;
836 clocks = <&cpg CPG_MOD 218>;
839 resets = <&cpg 218>;
878 clocks = <&cpg CPG_MOD 217>;
881 resets = <&cpg 217>;
1003 clocks = <&cpg CPG_MOD 812>;
1005 resets = <&cpg 812>;
1020 clocks = <&cpg CPG_MOD 916>,
1021 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1024 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1027 resets = <&cpg 916>;
1036 clocks = <&cpg CPG_MOD 915>,
1037 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1040 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1043 resets = <&cpg 915>;
1053 clocks = <&cpg CPG_MOD 914>,
1054 <&cpg CPG_CORE R8A774B1_CLK_CANFD>,
1057 assigned-clocks = <&cpg CPG_CORE R8A774B1_CLK_CANFD>;
1060 resets = <&cpg 914>;
1076 clocks = <&cpg CPG_MOD 523>;
1077 resets = <&cpg 523>;
1086 clocks = <&cpg CPG_MOD 523>;
1087 resets = <&cpg 523>;
1096 clocks = <&cpg CPG_MOD 523>;
1097 resets = <&cpg 523>;
1106 clocks = <&cpg CPG_MOD 523>;
1107 resets = <&cpg 523>;
1116 clocks = <&cpg CPG_MOD 523>;
1117 resets = <&cpg 523>;
1126 clocks = <&cpg CPG_MOD 523>;
1127 resets = <&cpg 523>;
1136 clocks = <&cpg CPG_MOD 523>;
1137 resets = <&cpg 523>;
1147 clocks = <&cpg CPG_MOD 207>,
1148 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1155 resets = <&cpg 207>;
1164 clocks = <&cpg CPG_MOD 206>,
1165 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1172 resets = <&cpg 206>;
1181 clocks = <&cpg CPG_MOD 310>,
1182 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1189 resets = <&cpg 310>;
1198 clocks = <&cpg CPG_MOD 204>,
1199 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1205 resets = <&cpg 204>;
1214 clocks = <&cpg CPG_MOD 203>,
1215 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1221 resets = <&cpg 203>;
1230 clocks = <&cpg CPG_MOD 202>,
1231 <&cpg CPG_CORE R8A774B1_CLK_S3D1>,
1238 resets = <&cpg 202>;
1247 clocks = <&cpg CPG_MOD 211>;
1252 resets = <&cpg 211>;
1263 clocks = <&cpg CPG_MOD 210>;
1268 resets = <&cpg 210>;
1279 clocks = <&cpg CPG_MOD 209>;
1283 resets = <&cpg 209>;
1294 clocks = <&cpg CPG_MOD 208>;
1298 resets = <&cpg 208>;
1308 clocks = <&cpg CPG_MOD 811>;
1310 resets = <&cpg 811>;
1340 clocks = <&cpg CPG_MOD 810>;
1342 resets = <&cpg 810>;
1372 clocks = <&cpg CPG_MOD 809>;
1374 resets = <&cpg 809>;
1404 clocks = <&cpg CPG_MOD 808>;
1406 resets = <&cpg 808>;
1436 clocks = <&cpg CPG_MOD 807>;
1438 resets = <&cpg 807>;
1468 clocks = <&cpg CPG_MOD 806>;
1470 resets = <&cpg 806>;
1500 clocks = <&cpg CPG_MOD 805>;
1502 resets = <&cpg 805>;
1532 clocks = <&cpg CPG_MOD 804>;
1534 resets = <&cpg 804>;
1581 clocks = <&cpg CPG_MOD 1005>,
1582 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1583 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1584 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1585 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1586 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1587 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1588 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1589 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1590 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1591 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1592 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1593 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1594 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1597 <&cpg CPG_CORE R8A774B1_CLK_S0D4>;
1610 resets = <&cpg 1005>,
1611 <&cpg 1006>, <&cpg 1007>,
1612 <&cpg 1008>, <&cpg 1009>,
1613 <&cpg 1010>, <&cpg 1011>,
1614 <&cpg 1012>, <&cpg 1013>,
1615 <&cpg 1014>, <&cpg 1015>;
1993 clocks = <&cpg CPG_MOD 502>;
1996 resets = <&cpg 502>;
2027 clocks = <&cpg CPG_MOD 501>;
2030 resets = <&cpg 501>;
2040 clocks = <&cpg CPG_MOD 328>;
2042 resets = <&cpg 328>;
2051 clocks = <&cpg CPG_MOD 328>;
2053 resets = <&cpg 328>;
2061 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2065 resets = <&cpg 703>, <&cpg 704>;
2073 clocks = <&cpg CPG_MOD 702>;
2077 resets = <&cpg 702>;
2085 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2090 resets = <&cpg 703>, <&cpg 704>;
2098 clocks = <&cpg CPG_MOD 702>;
2103 resets = <&cpg 702>;
2112 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2114 resets = <&cpg 703>, <&cpg 704>;
2123 clocks = <&cpg CPG_MOD 702>;
2125 resets = <&cpg 702>;
2135 clocks = <&cpg CPG_MOD 314>;
2138 resets = <&cpg 314>;
2147 clocks = <&cpg CPG_MOD 313>;
2150 resets = <&cpg 313>;
2159 clocks = <&cpg CPG_MOD 312>;
2162 resets = <&cpg 312>;
2171 clocks = <&cpg CPG_MOD 311>;
2174 resets = <&cpg 311>;
2186 clocks = <&cpg CPG_MOD 917>;
2189 resets = <&cpg 917>;
2200 clocks = <&cpg CPG_MOD 815>;
2202 resets = <&cpg 815>;
2217 clocks = <&cpg CPG_MOD 408>;
2220 resets = <&cpg 408>;
2243 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2246 resets = <&cpg 319>;
2270 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2273 resets = <&cpg 318>;
2289 clocks = <&cpg CPG_MOD 319>;
2291 resets = <&cpg 319>;
2308 clocks = <&cpg CPG_MOD 318>;
2310 resets = <&cpg 318>;
2319 clocks = <&cpg CPG_MOD 119>;
2321 resets = <&cpg 119>;
2328 clocks = <&cpg CPG_MOD 615>;
2330 resets = <&cpg 615>;
2337 clocks = <&cpg CPG_MOD 626>;
2339 resets = <&cpg 626>;
2348 clocks = <&cpg CPG_MOD 631>;
2350 resets = <&cpg 631>;
2359 clocks = <&cpg CPG_MOD 623>;
2361 resets = <&cpg 623>;
2370 clocks = <&cpg CPG_MOD 622>;
2372 resets = <&cpg 622>;
2380 clocks = <&cpg CPG_MOD 607>;
2382 resets = <&cpg 607>;
2388 clocks = <&cpg CPG_MOD 603>;
2390 resets = <&cpg 603>;
2396 clocks = <&cpg CPG_MOD 602>;
2398 resets = <&cpg 602>;
2404 clocks = <&cpg CPG_MOD 611>;
2406 resets = <&cpg 611>;
2413 clocks = <&cpg CPG_MOD 714>;
2415 resets = <&cpg 714>;
2468 clocks = <&cpg CPG_MOD 716>;
2470 resets = <&cpg 716>;
2524 clocks = <&cpg CPG_MOD 729>,
2525 <&cpg CPG_CORE R8A774B1_CLK_HDMI>;
2528 resets = <&cpg 729>;
2557 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,
2558 <&cpg CPG_MOD 721>;
2560 resets = <&cpg 724>, <&cpg 722>;
2593 clocks = <&cpg CPG_MOD 727>;
2595 resets = <&cpg 727>;