Lines Matching refs:cpg
10 #include <dt-bindings/clock/r8a774e1-cpg-mssr.h>
138 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
152 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
166 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
180 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z>;
196 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
209 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
222 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
235 clocks = <&cpg CPG_CORE R8A774E1_CLK_Z2>;
340 clocks = <&cpg CPG_MOD 402>;
342 resets = <&cpg 402>;
356 clocks = <&cpg CPG_MOD 912>;
358 resets = <&cpg 912>;
371 clocks = <&cpg CPG_MOD 911>;
373 resets = <&cpg 911>;
386 clocks = <&cpg CPG_MOD 910>;
388 resets = <&cpg 910>;
401 clocks = <&cpg CPG_MOD 909>;
403 resets = <&cpg 909>;
416 clocks = <&cpg CPG_MOD 908>;
418 resets = <&cpg 908>;
431 clocks = <&cpg CPG_MOD 907>;
433 resets = <&cpg 907>;
446 clocks = <&cpg CPG_MOD 906>;
448 resets = <&cpg 906>;
461 clocks = <&cpg CPG_MOD 905>;
463 resets = <&cpg 905>;
477 clocks = <&cpg CPG_MOD 303>;
480 resets = <&cpg 303>;
496 clocks = <&cpg CPG_MOD 302>;
499 resets = <&cpg 302>;
515 clocks = <&cpg CPG_MOD 301>;
518 resets = <&cpg 301>;
534 clocks = <&cpg CPG_MOD 300>;
537 resets = <&cpg 300>;
541 cpg: clock-controller@e6150000 { label
542 compatible = "renesas,r8a774e1-cpg-mssr";
570 clocks = <&cpg CPG_MOD 522>;
572 resets = <&cpg 522>;
587 clocks = <&cpg CPG_MOD 407>;
589 resets = <&cpg 407>;
598 clocks = <&cpg CPG_MOD 125>;
601 resets = <&cpg 125>;
611 clocks = <&cpg CPG_MOD 124>;
614 resets = <&cpg 124>;
624 clocks = <&cpg CPG_MOD 123>;
627 resets = <&cpg 123>;
637 clocks = <&cpg CPG_MOD 122>;
640 resets = <&cpg 122>;
650 clocks = <&cpg CPG_MOD 121>;
653 resets = <&cpg 121>;
664 clocks = <&cpg CPG_MOD 931>;
666 resets = <&cpg 931>;
681 clocks = <&cpg CPG_MOD 930>;
683 resets = <&cpg 930>;
698 clocks = <&cpg CPG_MOD 929>;
700 resets = <&cpg 929>;
715 clocks = <&cpg CPG_MOD 928>;
717 resets = <&cpg 928>;
731 clocks = <&cpg CPG_MOD 927>;
733 resets = <&cpg 927>;
747 clocks = <&cpg CPG_MOD 919>;
749 resets = <&cpg 919>;
763 clocks = <&cpg CPG_MOD 918>;
765 resets = <&cpg 918>;
780 clocks = <&cpg CPG_MOD 926>;
782 resets = <&cpg 926>;
794 clocks = <&cpg CPG_MOD 520>,
795 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
802 resets = <&cpg 520>;
812 clocks = <&cpg CPG_MOD 519>,
813 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
820 resets = <&cpg 519>;
830 clocks = <&cpg CPG_MOD 518>,
831 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
838 resets = <&cpg 518>;
848 clocks = <&cpg CPG_MOD 517>,
849 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
855 resets = <&cpg 517>;
865 clocks = <&cpg CPG_MOD 516>,
866 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
872 resets = <&cpg 516>;
881 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>;
889 resets = <&cpg 704>, <&cpg 703>;
897 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>,
903 resets = <&cpg 703>, <&cpg 704>;
915 clocks = <&cpg CPG_MOD 330>;
917 resets = <&cpg 330>;
929 clocks = <&cpg CPG_MOD 331>;
931 resets = <&cpg 331>;
940 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>,
944 resets = <&cpg 328>;
975 clocks = <&cpg CPG_MOD 219>;
978 resets = <&cpg 219>;
1017 clocks = <&cpg CPG_MOD 218>;
1020 resets = <&cpg 218>;
1059 clocks = <&cpg CPG_MOD 217>;
1062 resets = <&cpg 217>;
1232 clocks = <&cpg CPG_MOD 812>;
1234 resets = <&cpg 812>;
1249 clocks = <&cpg CPG_MOD 916>,
1250 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1253 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1256 resets = <&cpg 916>;
1265 clocks = <&cpg CPG_MOD 915>,
1266 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1269 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1272 resets = <&cpg 915>;
1282 clocks = <&cpg CPG_MOD 914>,
1283 <&cpg CPG_CORE R8A774E1_CLK_CANFD>,
1286 assigned-clocks = <&cpg CPG_CORE R8A774E1_CLK_CANFD>;
1289 resets = <&cpg 914>;
1304 clocks = <&cpg CPG_MOD 523>;
1306 resets = <&cpg 523>;
1314 clocks = <&cpg CPG_MOD 523>;
1316 resets = <&cpg 523>;
1324 clocks = <&cpg CPG_MOD 523>;
1326 resets = <&cpg 523>;
1334 clocks = <&cpg CPG_MOD 523>;
1336 resets = <&cpg 523>;
1344 clocks = <&cpg CPG_MOD 523>;
1346 resets = <&cpg 523>;
1354 clocks = <&cpg CPG_MOD 523>;
1356 resets = <&cpg 523>;
1364 clocks = <&cpg CPG_MOD 523>;
1366 resets = <&cpg 523>;
1376 clocks = <&cpg CPG_MOD 207>,
1377 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1384 resets = <&cpg 207>;
1393 clocks = <&cpg CPG_MOD 206>,
1394 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1401 resets = <&cpg 206>;
1410 clocks = <&cpg CPG_MOD 310>,
1411 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1418 resets = <&cpg 310>;
1427 clocks = <&cpg CPG_MOD 204>,
1428 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1434 resets = <&cpg 204>;
1443 clocks = <&cpg CPG_MOD 203>,
1444 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1450 resets = <&cpg 203>;
1459 clocks = <&cpg CPG_MOD 202>,
1460 <&cpg CPG_CORE R8A774E1_CLK_S3D1>,
1467 resets = <&cpg 202>;
1476 clocks = <&cpg CPG_MOD 211>;
1481 resets = <&cpg 211>;
1492 clocks = <&cpg CPG_MOD 210>;
1497 resets = <&cpg 210>;
1508 clocks = <&cpg CPG_MOD 209>;
1512 resets = <&cpg 209>;
1523 clocks = <&cpg CPG_MOD 208>;
1527 resets = <&cpg 208>;
1537 clocks = <&cpg CPG_MOD 811>;
1539 resets = <&cpg 811>;
1569 clocks = <&cpg CPG_MOD 810>;
1571 resets = <&cpg 810>;
1601 clocks = <&cpg CPG_MOD 809>;
1603 resets = <&cpg 809>;
1633 clocks = <&cpg CPG_MOD 808>;
1635 resets = <&cpg 808>;
1665 clocks = <&cpg CPG_MOD 807>;
1667 resets = <&cpg 807>;
1693 clocks = <&cpg CPG_MOD 806>;
1695 resets = <&cpg 806>;
1721 clocks = <&cpg CPG_MOD 805>;
1723 resets = <&cpg 805>;
1749 clocks = <&cpg CPG_MOD 804>;
1751 resets = <&cpg 804>;
1794 clocks = <&cpg CPG_MOD 1005>,
1795 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
1796 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
1797 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
1798 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
1799 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
1800 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
1801 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
1802 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
1803 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
1804 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
1805 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1806 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>,
1807 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
1810 <&cpg CPG_CORE R8A774E1_CLK_S0D4>;
1823 resets = <&cpg 1005>,
1824 <&cpg 1006>, <&cpg 1007>,
1825 <&cpg 1008>, <&cpg 1009>,
1826 <&cpg 1010>, <&cpg 1011>,
1827 <&cpg 1012>, <&cpg 1013>,
1828 <&cpg 1014>, <&cpg 1015>;
2206 clocks = <&cpg CPG_MOD 502>;
2209 resets = <&cpg 502>;
2248 clocks = <&cpg CPG_MOD 501>;
2251 resets = <&cpg 501>;
2269 clocks = <&cpg CPG_MOD 328>;
2271 resets = <&cpg 328>;
2280 clocks = <&cpg CPG_MOD 328>;
2282 resets = <&cpg 328>;
2290 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2294 resets = <&cpg 703>, <&cpg 704>;
2302 clocks = <&cpg CPG_MOD 702>;
2306 resets = <&cpg 702>;
2314 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2319 resets = <&cpg 703>, <&cpg 704>;
2327 clocks = <&cpg CPG_MOD 702>;
2332 resets = <&cpg 702>;
2341 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>;
2343 resets = <&cpg 703>, <&cpg 704>;
2352 clocks = <&cpg CPG_MOD 702>;
2354 resets = <&cpg 702>;
2364 clocks = <&cpg CPG_MOD 314>;
2367 resets = <&cpg 314>;
2377 clocks = <&cpg CPG_MOD 313>;
2380 resets = <&cpg 313>;
2390 clocks = <&cpg CPG_MOD 312>;
2393 resets = <&cpg 312>;
2403 clocks = <&cpg CPG_MOD 311>;
2406 resets = <&cpg 311>;
2419 clocks = <&cpg CPG_MOD 917>;
2422 resets = <&cpg 917>;
2433 clocks = <&cpg CPG_MOD 815>;
2435 resets = <&cpg 815>;
2451 clocks = <&cpg CPG_MOD 408>;
2454 resets = <&cpg 408>;
2477 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
2480 resets = <&cpg 319>;
2504 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
2507 resets = <&cpg 318>;
2523 clocks = <&cpg CPG_MOD 319>;
2525 resets = <&cpg 319>;
2542 clocks = <&cpg CPG_MOD 318>;
2544 resets = <&cpg 318>;
2553 clocks = <&cpg CPG_MOD 624>;
2555 resets = <&cpg 624>;
2564 clocks = <&cpg CPG_MOD 626>;
2566 resets = <&cpg 626>;
2575 clocks = <&cpg CPG_MOD 623>;
2577 resets = <&cpg 623>;
2586 clocks = <&cpg CPG_MOD 622>;
2588 resets = <&cpg 622>;
2597 clocks = <&cpg CPG_MOD 631>;
2599 resets = <&cpg 631>;
2608 clocks = <&cpg CPG_MOD 630>;
2610 resets = <&cpg 630>;
2619 clocks = <&cpg CPG_MOD 119>;
2621 resets = <&cpg 119>;
2629 clocks = <&cpg CPG_MOD 118>;
2631 resets = <&cpg 118>;
2638 clocks = <&cpg CPG_MOD 615>;
2640 resets = <&cpg 615>;
2646 clocks = <&cpg CPG_MOD 614>;
2648 resets = <&cpg 614>;
2654 clocks = <&cpg CPG_MOD 607>;
2656 resets = <&cpg 607>;
2662 clocks = <&cpg CPG_MOD 606>;
2664 resets = <&cpg 606>;
2670 clocks = <&cpg CPG_MOD 611>;
2672 resets = <&cpg 611>;
2678 clocks = <&cpg CPG_MOD 610>;
2680 resets = <&cpg 610>;
2686 clocks = <&cpg CPG_MOD 603>;
2688 resets = <&cpg 603>;
2694 clocks = <&cpg CPG_MOD 602>;
2696 resets = <&cpg 602>;
2703 clocks = <&cpg CPG_MOD 714>;
2705 resets = <&cpg 714>;
2758 clocks = <&cpg CPG_MOD 716>;
2760 resets = <&cpg 716>;
2798 clocks = <&cpg CPG_MOD 729>,
2799 <&cpg CPG_CORE R8A774E1_CLK_HDMI>;
2802 resets = <&cpg 729>;
2831 clocks = <&cpg CPG_MOD 724>,
2832 <&cpg CPG_MOD 723>,
2833 <&cpg CPG_MOD 721>;
2835 resets = <&cpg 724>, <&cpg 722>;
2868 clocks = <&cpg CPG_MOD 727>;
2870 resets = <&cpg 727>;