Lines Matching refs:cpg
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
55 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
65 clocks = <&cpg CPG_CORE R8A7792_CLK_Z>;
113 clocks = <&cpg CPG_MOD 402>;
115 resets = <&cpg 402>;
129 clocks = <&cpg CPG_MOD 912>;
131 resets = <&cpg 912>;
144 clocks = <&cpg CPG_MOD 911>;
146 resets = <&cpg 911>;
159 clocks = <&cpg CPG_MOD 910>;
161 resets = <&cpg 910>;
174 clocks = <&cpg CPG_MOD 909>;
176 resets = <&cpg 909>;
189 clocks = <&cpg CPG_MOD 908>;
191 resets = <&cpg 908>;
204 clocks = <&cpg CPG_MOD 907>;
206 resets = <&cpg 907>;
219 clocks = <&cpg CPG_MOD 905>;
221 resets = <&cpg 905>;
234 clocks = <&cpg CPG_MOD 904>;
236 resets = <&cpg 904>;
249 clocks = <&cpg CPG_MOD 921>;
251 resets = <&cpg 921>;
264 clocks = <&cpg CPG_MOD 919>;
266 resets = <&cpg 919>;
279 clocks = <&cpg CPG_MOD 914>;
281 resets = <&cpg 914>;
294 clocks = <&cpg CPG_MOD 913>;
296 resets = <&cpg 913>;
304 cpg: clock-controller@e6150000 { label
305 compatible = "renesas,r8a7792-cpg-mssr";
340 clocks = <&cpg CPG_MOD 407>;
342 resets = <&cpg 407>;
372 clocks = <&cpg CPG_MOD 931>;
374 resets = <&cpg 931>;
386 clocks = <&cpg CPG_MOD 930>;
388 resets = <&cpg 930>;
400 clocks = <&cpg CPG_MOD 929>;
402 resets = <&cpg 929>;
414 clocks = <&cpg CPG_MOD 928>;
416 resets = <&cpg 928>;
428 clocks = <&cpg CPG_MOD 927>;
430 resets = <&cpg 927>;
442 clocks = <&cpg CPG_MOD 925>;
444 resets = <&cpg 925>;
459 clocks = <&cpg CPG_MOD 926>;
464 resets = <&cpg 926>;
493 clocks = <&cpg CPG_MOD 219>;
496 resets = <&cpg 219>;
526 clocks = <&cpg CPG_MOD 218>;
529 resets = <&cpg 218>;
539 clocks = <&cpg CPG_MOD 812>;
541 resets = <&cpg 812>;
551 clocks = <&cpg CPG_MOD 917>;
556 resets = <&cpg 917>;
568 clocks = <&cpg CPG_MOD 721>,
569 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
575 resets = <&cpg 721>;
584 clocks = <&cpg CPG_MOD 720>,
585 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
591 resets = <&cpg 720>;
600 clocks = <&cpg CPG_MOD 719>,
601 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
607 resets = <&cpg 719>;
616 clocks = <&cpg CPG_MOD 718>,
617 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
623 resets = <&cpg 718>;
632 clocks = <&cpg CPG_MOD 717>,
633 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
639 resets = <&cpg 717>;
648 clocks = <&cpg CPG_MOD 716>,
649 <&cpg CPG_CORE R8A7792_CLK_ZS>, <&scif_clk>;
655 resets = <&cpg 716>;
664 clocks = <&cpg CPG_MOD 000>;
669 resets = <&cpg 000>;
680 clocks = <&cpg CPG_MOD 208>;
685 resets = <&cpg 208>;
696 clocks = <&cpg CPG_MOD 916>,
697 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
700 resets = <&cpg 916>;
709 clocks = <&cpg CPG_MOD 915>,
710 <&cpg CPG_CORE R8A7792_CLK_RCAN>, <&can_clk>;
713 resets = <&cpg 915>;
722 clocks = <&cpg CPG_MOD 811>;
724 resets = <&cpg 811>;
733 clocks = <&cpg CPG_MOD 810>;
735 resets = <&cpg 810>;
744 clocks = <&cpg CPG_MOD 809>;
746 resets = <&cpg 809>;
755 clocks = <&cpg CPG_MOD 808>;
757 resets = <&cpg 808>;
766 clocks = <&cpg CPG_MOD 805>;
768 resets = <&cpg 805>;
777 clocks = <&cpg CPG_MOD 804>;
779 resets = <&cpg 804>;
791 clocks = <&cpg CPG_MOD 314>;
793 resets = <&cpg 314>;
807 clocks = <&cpg CPG_MOD 408>;
810 resets = <&cpg 408>;
817 clocks = <&cpg CPG_MOD 131>;
819 resets = <&cpg 131>;
826 clocks = <&cpg CPG_MOD 128>;
828 resets = <&cpg 128>;
835 clocks = <&cpg CPG_MOD 127>;
837 resets = <&cpg 127>;
845 clocks = <&cpg CPG_MOD 106>;
847 resets = <&cpg 106>;
855 clocks = <&cpg CPG_MOD 724>,
856 <&cpg CPG_MOD 723>;
888 clocks = <&cpg CPG_MOD 124>;
891 resets = <&cpg 124>;
908 clocks = <&cpg CPG_MOD 329>;
911 resets = <&cpg 329>;