Lines Matching refs:clock_id
63 unsigned long clock_start_pll(enum clock_id id, u32 divm, u32 divn,
75 int clock_set_pllout(enum clock_id clkid, enum pll_out_id pllout,
90 int clock_ll_read_pll(enum clock_id clkid, u32 *divm, u32 *divn,
198 enum clock_id clock_get_periph_parent(enum periph_id periph_id);
210 enum clock_id parent, unsigned rate);
223 enum clock_id parent);
239 enum clock_id parent, unsigned rate, int *extra_div);
247 unsigned clock_get_rate(enum clock_id clkid);
299 struct clk_pll_simple *clock_get_simple_pll(enum clock_id clkid);
329 enum clock_id get_periph_clock_id(enum periph_id periph_id, int source);
344 enum clock_id parent, int *mux_bits, int *divider_bits);
373 int clock_set_rate(enum clock_id clkid, u32 n, u32 m, u32 p, u32 cpcon);
411 enum clock_id parent_clock_id;