Lines Matching defs:dvc_ctlr
55 struct dvc_ctlr { struct
56 u32 ctrl1; /* 00: DVC_CTRL_REG1 */
57 u32 ctrl2; /* 04: DVC_CTRL_REG2 */
58 u32 ctrl3; /* 08: DVC_CTRL_REG3 */
59 u32 status; /* 0C: DVC_STATUS_REG */
60 u32 ctrl; /* 10: DVC_I2C_CTRL_REG */
61 u32 addr_data; /* 14: DVC_I2C_ADDR_DATA_REG */
62 u32 reserved_0[2]; /* 18: */
63 u32 req; /* 20: DVC_REQ_REGISTER */
64 u32 addr_data3; /* 24: DVC_I2C_ADDR_DATA_REG_3 */
65 u32 reserved_1[6]; /* 28: */
66 u32 cnfg; /* 40: DVC_I2C_CNFG */
67 u32 cmd_addr0; /* 44: DVC_I2C_CMD_ADDR0 */
68 u32 cmd_addr1; /* 48: DVC_I2C_CMD_ADDR1 */
69 u32 cmd_data1; /* 4C: DVC_I2C_CMD_DATA1 */
70 u32 cmd_data2; /* 50: DVC_I2C_CMD_DATA2 */
71 u32 reserved_2[2]; /* 54: */
72 u32 i2c_status; /* 5C: DVC_I2C_STATUS */
73 struct i2c_control control; /* 60 ~ 78 */