Lines Matching refs:davinci_syscfg1_regs
170 tmp = readl(&davinci_syscfg1_regs->vtpio_ctl); in da850_ddr_setup()
173 clrbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN); in da850_ddr_setup()
174 clrbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK); in da850_ddr_setup()
175 setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_CLKRZ); in da850_ddr_setup()
176 clrbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_CLKRZ); in da850_ddr_setup()
177 setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_CLKRZ); in da850_ddr_setup()
180 tmp = readl(&davinci_syscfg1_regs->vtpio_ctl); in da850_ddr_setup()
182 tmp = readl(&davinci_syscfg1_regs->vtpio_ctl); in da850_ddr_setup()
184 setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_LOCK); in da850_ddr_setup()
185 setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_POWERDWN); in da850_ddr_setup()
187 setbits_le32(&davinci_syscfg1_regs->vtpio_ctl, VTP_IOPWRDWN); in da850_ddr_setup()
192 clrbits_le32(&davinci_syscfg1_regs->ddr_slew, in da850_ddr_setup()
197 setbits_le32(&davinci_syscfg1_regs->ddr_slew, in da850_ddr_setup()