Lines Matching refs:mem
17 int dmc_config_zq(struct mem_timings *mem, uint32_t *phy0_con16, in dmc_config_zq() argument
30 val |= mem->zq_mode_dds << PHY_CON16_ZQ_MODE_DDS_SHIFT; in dmc_config_zq()
31 val |= mem->zq_mode_term << PHY_CON16_ZQ_MODE_TERM_SHIFT; in dmc_config_zq()
37 if (mem->zq_mode_noterm) in dmc_config_zq()
95 void dmc_config_mrs(struct mem_timings *mem, uint32_t *directcmd) in dmc_config_mrs() argument
99 for (channel = 0; channel < mem->dmc_channels; channel++) { in dmc_config_mrs()
103 for (chip = 0; chip < mem->chips_to_configure; chip++) { in dmc_config_mrs()
120 writel(mem->direct_cmd_msr[i] | mask, in dmc_config_mrs()
125 if (mem->send_zq_init) { in dmc_config_mrs()
136 void dmc_config_prech(struct mem_timings *mem, uint32_t *directcmd) in dmc_config_prech() argument
140 for (channel = 0; channel < mem->dmc_channels; channel++) { in dmc_config_prech()
144 for (chip = 0; chip < mem->chips_per_channel; chip++) { in dmc_config_prech()
157 struct mem_timings *mem; in mem_ctrl_init() local
160 mem = clock_get_mem_timings(); in mem_ctrl_init()
164 ret = ddr3_mem_ctrl_init(mem, reset); in mem_ctrl_init()