Lines Matching refs:BUS_CLOCK_SLICE
43 {MAIN_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 0,
48 {ENET_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 1,
53 {NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
58 {VPU_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 3,
63 {DISPLAY_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
68 {DISPLAY_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
73 {DISPLAY_RTRM_CLK_ROOT, BUS_CLOCK_SLICE, 6,
78 {USB_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 7,
83 {GPU_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 8,
88 {GPU_AHB_CLK_ROOT, BUS_CLOCK_SLICE, 9,
93 {NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
98 {NOC_APB_CLK_ROOT, BUS_CLOCK_SLICE, 11,
505 {MAIN_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 0,
510 {ENET_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 1,
515 {NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
520 {VPU_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 3,
525 {DISPLAY_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
530 {DISPLAY_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
535 {DISPLAY_RTRM_CLK_ROOT, BUS_CLOCK_SLICE, 6,
540 {USB_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 7,
545 {GPU_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 8,
550 {GPU_AHB_CLK_ROOT, BUS_CLOCK_SLICE, 9,
555 {NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
560 {NOC_APB_CLK_ROOT, BUS_CLOCK_SLICE, 11,
959 {MAIN_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 0,
964 {ENET_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 1,
969 {NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
974 {DISPLAY_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
979 {DISPLAY_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
984 {USB_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 7,
989 {GPU_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 8,
994 {GPU_AHB_CLK_ROOT, BUS_CLOCK_SLICE, 9,
999 {NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
1313 {MAIN_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 0,
1318 {ENET_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 1,
1323 {NAND_USDHC_BUS_CLK_ROOT, BUS_CLOCK_SLICE, 2,
1328 {MEDIA_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 4,
1333 {MEDIA_APB_CLK_ROOT, BUS_CLOCK_SLICE, 5,
1338 {HDMI_APB_CLK_ROOT, BUS_CLOCK_SLICE, 6,
1343 {HDMI_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 7,
1348 {NOC_CLK_ROOT, BUS_CLOCK_SLICE, 10,
1353 {NOC_IO_CLK_ROOT, BUS_CLOCK_SLICE, 11,
1358 {ML_AXI_CLK_ROOT, BUS_CLOCK_SLICE, 12,
1363 {ML_AHB_CLK_ROOT, BUS_CLOCK_SLICE, 13,
1635 case BUS_CLOCK_SLICE: in get_clk_root_target()