Lines Matching refs:clock_id
375 static int select(enum clk_root_index clock_id) in select() argument
383 if (clock_id == p->entry) in select()
409 int clock_set_src(enum clk_root_index clock_id, enum clk_root_src clock_src) in clock_set_src() argument
414 if (clock_id >= CLK_ROOT_MAX) in clock_set_src()
417 root_entry = select(clock_id); in clock_set_src()
425 reg = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_src()
428 __raw_writel(reg, &imx_ccm->root[clock_id].target_root); in clock_set_src()
434 int clock_get_src(enum clk_root_index clock_id, enum clk_root_src *p_clock_src) in clock_get_src() argument
440 if (clock_id >= CLK_ROOT_MAX) in clock_get_src()
443 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_src()
447 root_entry = select(clock_id); in clock_get_src()
457 int clock_set_prediv(enum clk_root_index clock_id, enum root_pre_div pre_div) in clock_set_prediv() argument
463 if (clock_id >= CLK_ROOT_MAX) in clock_set_prediv()
466 root_entry = select(clock_id); in clock_set_prediv()
481 reg = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_prediv()
484 __raw_writel(reg, &imx_ccm->root[clock_id].target_root); in clock_set_prediv()
489 int clock_get_prediv(enum clk_root_index clock_id, enum root_pre_div *pre_div) in clock_get_prediv() argument
495 if (clock_id >= CLK_ROOT_MAX) in clock_get_prediv()
498 root_entry = select(clock_id); in clock_get_prediv()
511 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_prediv()
520 int clock_set_postdiv(enum clk_root_index clock_id, enum root_post_div div) in clock_set_postdiv() argument
524 if (clock_id >= CLK_ROOT_MAX) in clock_set_postdiv()
527 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_set_postdiv()
535 if ((clock_id == DRAM_CLK_ROOT) && (div > CLK_ROOT_POST_DIV7)) { in clock_set_postdiv()
540 reg = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_postdiv()
543 __raw_writel(reg, &imx_ccm->root[clock_id].target_root); in clock_set_postdiv()
548 int clock_get_postdiv(enum clk_root_index clock_id, enum root_post_div *div) in clock_get_postdiv() argument
552 if (clock_id >= CLK_ROOT_MAX) in clock_get_postdiv()
555 if (clock_id == DRAM_PHYM_CLK_ROOT) { in clock_get_postdiv()
560 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_postdiv()
561 if (clock_id == DRAM_CLK_ROOT) in clock_get_postdiv()
572 int clock_set_autopostdiv(enum clk_root_index clock_id, enum root_auto_div div, in clock_set_autopostdiv() argument
579 if (clock_id >= CLK_ROOT_MAX) in clock_set_autopostdiv()
582 root_entry = select(clock_id); in clock_set_autopostdiv()
596 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_set_autopostdiv()
605 __raw_writel(val, &imx_ccm->root[clock_id].target_root); in clock_set_autopostdiv()
610 int clock_get_autopostdiv(enum clk_root_index clock_id, enum root_auto_div *div, in clock_get_autopostdiv() argument
617 if (clock_id >= CLK_ROOT_MAX) in clock_get_autopostdiv()
620 root_entry = select(clock_id); in clock_get_autopostdiv()
636 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_autopostdiv()
650 int clock_get_target_val(enum clk_root_index clock_id, u32 *val) in clock_get_target_val() argument
652 if (clock_id >= CLK_ROOT_MAX) in clock_get_target_val()
655 *val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_get_target_val()
660 int clock_set_target_val(enum clk_root_index clock_id, u32 val) in clock_set_target_val() argument
662 if (clock_id >= CLK_ROOT_MAX) in clock_set_target_val()
665 __raw_writel(val, &imx_ccm->root[clock_id].target_root); in clock_set_target_val()
671 int clock_root_cfg(enum clk_root_index clock_id, enum root_pre_div pre_div, in clock_root_cfg() argument
678 if (clock_id >= CLK_ROOT_MAX) in clock_root_cfg()
681 root_entry = select(clock_id); in clock_root_cfg()
719 __raw_writel(val, &imx_ccm->root[clock_id].target_root); in clock_root_cfg()
724 int clock_root_enabled(enum clk_root_index clock_id) in clock_root_enabled() argument
728 if (clock_id >= CLK_ROOT_MAX) in clock_root_enabled()
734 if ((clock_id == DRAM_PHYM_CLK_ROOT) || (clock_id == DRAM_CLK_ROOT)) in clock_root_enabled()
737 val = __raw_readl(&imx_ccm->root[clock_id].target_root); in clock_root_enabled()