Lines Matching refs:bank_end
110 u64 bank_start, bank_end, bank_size, usable_bank_size; in cboot_dram_init() local
118 bank_end = bank_start + bank_size; in cboot_dram_init()
120 bank_start, bank_end, bank_size); in cboot_dram_init()
130 bank_end = bank_end & ~(SZ_2M - 1); in cboot_dram_init()
131 bank_size = bank_end - bank_start; in cboot_dram_init()
133 bank_start, bank_end, bank_size); in cboot_dram_init()
134 if (bank_end <= bank_start) in cboot_dram_init()
147 if (bank_end > SZ_4G) in cboot_dram_init()
148 bank_end = SZ_4G; in cboot_dram_init()
149 debug(" end %llx (usable)\n", bank_end); in cboot_dram_init()
150 usable_bank_size = bank_end - bank_start; in cboot_dram_init()
153 (bank_end > ram_top)) { in cboot_dram_init()
154 ram_top = bank_end; in cboot_dram_init()
233 u64 bank_end = bank_start + bank_size; in mark_ram_allocated() local
235 bool keep_tail = allocated_end != bank_end; in mark_ram_allocated()
254 tegra_mem_map[bank].size = bank_end - allocated_end; in mark_ram_allocated()
260 tegra_mem_map[bank].size = bank_end - allocated_end; in mark_ram_allocated()
279 u64 bank_end = bank_start + bank_size; in reserve_ram() local
281 if (end <= bank_start || start > bank_end) in reserve_ram()
295 u64 bank_end = bank_start + bank_size; in alloc_ram() local
299 if (allocated_end > bank_end) in alloc_ram()
406 u64 bank_end = bank_start + bank_size; in dump_ram_banks() local
411 bank_start, bank_end, bank_size); in dump_ram_banks()