Lines Matching refs:ivc
73 static inline void tegra_ivc_invalidate_counter(struct tegra_ivc *ivc, in tegra_ivc_invalidate_counter() argument
81 static inline void tegra_ivc_flush_counter(struct tegra_ivc *ivc, in tegra_ivc_flush_counter() argument
89 static inline ulong tegra_ivc_frame_addr(struct tegra_ivc *ivc, in tegra_ivc_frame_addr() argument
93 BUG_ON(frame >= ivc->nframes); in tegra_ivc_frame_addr()
96 (ivc->frame_size * frame); in tegra_ivc_frame_addr()
99 static inline void *tegra_ivc_frame_pointer(struct tegra_ivc *ivc, in tegra_ivc_frame_pointer() argument
103 return (void *)tegra_ivc_frame_addr(ivc, ch, frame); in tegra_ivc_frame_pointer()
106 static inline void tegra_ivc_invalidate_frame(struct tegra_ivc *ivc, in tegra_ivc_invalidate_frame() argument
110 ulong base = tegra_ivc_frame_addr(ivc, h, frame); in tegra_ivc_invalidate_frame()
111 invalidate_dcache_range(base, base + ivc->frame_size); in tegra_ivc_invalidate_frame()
114 static inline void tegra_ivc_flush_frame(struct tegra_ivc *ivc, in tegra_ivc_flush_frame() argument
118 ulong base = tegra_ivc_frame_addr(ivc, h, frame); in tegra_ivc_flush_frame()
119 flush_dcache_range(base, base + ivc->frame_size); in tegra_ivc_flush_frame()
122 static inline int tegra_ivc_channel_empty(struct tegra_ivc *ivc, in tegra_ivc_channel_empty() argument
143 if (w_count - r_count > ivc->nframes) in tegra_ivc_channel_empty()
149 static inline int tegra_ivc_channel_full(struct tegra_ivc *ivc, in tegra_ivc_channel_full() argument
157 ivc->nframes; in tegra_ivc_channel_full()
160 static inline void tegra_ivc_advance_rx(struct tegra_ivc *ivc) in tegra_ivc_advance_rx() argument
162 WRITE_ONCE(ivc->rx_channel->r_count, in tegra_ivc_advance_rx()
163 READ_ONCE(ivc->rx_channel->r_count) + 1); in tegra_ivc_advance_rx()
165 if (ivc->r_pos == ivc->nframes - 1) in tegra_ivc_advance_rx()
166 ivc->r_pos = 0; in tegra_ivc_advance_rx()
168 ivc->r_pos++; in tegra_ivc_advance_rx()
171 static inline void tegra_ivc_advance_tx(struct tegra_ivc *ivc) in tegra_ivc_advance_tx() argument
173 WRITE_ONCE(ivc->tx_channel->w_count, in tegra_ivc_advance_tx()
174 READ_ONCE(ivc->tx_channel->w_count) + 1); in tegra_ivc_advance_tx()
176 if (ivc->w_pos == ivc->nframes - 1) in tegra_ivc_advance_tx()
177 ivc->w_pos = 0; in tegra_ivc_advance_tx()
179 ivc->w_pos++; in tegra_ivc_advance_tx()
182 static inline int tegra_ivc_check_read(struct tegra_ivc *ivc) in tegra_ivc_check_read() argument
194 if (ivc->tx_channel->state != ivc_state_established) in tegra_ivc_check_read()
203 if (!tegra_ivc_channel_empty(ivc, ivc->rx_channel)) in tegra_ivc_check_read()
207 tegra_ivc_invalidate_counter(ivc, ivc->rx_channel, offset); in tegra_ivc_check_read()
208 return tegra_ivc_channel_empty(ivc, ivc->rx_channel) ? -ENOMEM : 0; in tegra_ivc_check_read()
211 static inline int tegra_ivc_check_write(struct tegra_ivc *ivc) in tegra_ivc_check_write() argument
215 if (ivc->tx_channel->state != ivc_state_established) in tegra_ivc_check_write()
218 if (!tegra_ivc_channel_full(ivc, ivc->tx_channel)) in tegra_ivc_check_write()
222 tegra_ivc_invalidate_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_check_write()
223 return tegra_ivc_channel_full(ivc, ivc->tx_channel) ? -ENOMEM : 0; in tegra_ivc_check_write()
226 static inline uint32_t tegra_ivc_channel_avail_count(struct tegra_ivc *ivc, in tegra_ivc_channel_avail_count() argument
238 int tegra_ivc_read_get_next_frame(struct tegra_ivc *ivc, void **frame) in tegra_ivc_read_get_next_frame() argument
240 int result = tegra_ivc_check_read(ivc); in tegra_ivc_read_get_next_frame()
250 tegra_ivc_invalidate_frame(ivc, ivc->rx_channel, ivc->r_pos); in tegra_ivc_read_get_next_frame()
251 *frame = tegra_ivc_frame_pointer(ivc, ivc->rx_channel, ivc->r_pos); in tegra_ivc_read_get_next_frame()
256 int tegra_ivc_read_advance(struct tegra_ivc *ivc) in tegra_ivc_read_advance() argument
266 result = tegra_ivc_check_read(ivc); in tegra_ivc_read_advance()
270 tegra_ivc_advance_rx(ivc); in tegra_ivc_read_advance()
272 tegra_ivc_flush_counter(ivc, ivc->rx_channel, offset); in tegra_ivc_read_advance()
280 tegra_ivc_invalidate_counter(ivc, ivc->rx_channel, offset); in tegra_ivc_read_advance()
282 if (tegra_ivc_channel_avail_count(ivc, ivc->rx_channel) == in tegra_ivc_read_advance()
283 ivc->nframes - 1) in tegra_ivc_read_advance()
284 ivc->notify(ivc); in tegra_ivc_read_advance()
289 int tegra_ivc_write_get_next_frame(struct tegra_ivc *ivc, void **frame) in tegra_ivc_write_get_next_frame() argument
291 int result = tegra_ivc_check_write(ivc); in tegra_ivc_write_get_next_frame()
295 *frame = tegra_ivc_frame_pointer(ivc, ivc->tx_channel, ivc->w_pos); in tegra_ivc_write_get_next_frame()
300 int tegra_ivc_write_advance(struct tegra_ivc *ivc) in tegra_ivc_write_advance() argument
305 result = tegra_ivc_check_write(ivc); in tegra_ivc_write_advance()
309 tegra_ivc_flush_frame(ivc, ivc->tx_channel, ivc->w_pos); in tegra_ivc_write_advance()
316 tegra_ivc_advance_tx(ivc); in tegra_ivc_write_advance()
318 tegra_ivc_flush_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_write_advance()
326 tegra_ivc_invalidate_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_write_advance()
328 if (tegra_ivc_channel_avail_count(ivc, ivc->tx_channel) == 1) in tegra_ivc_write_advance()
329 ivc->notify(ivc); in tegra_ivc_write_advance()
353 int tegra_ivc_channel_notified(struct tegra_ivc *ivc) in tegra_ivc_channel_notified() argument
360 tegra_ivc_invalidate_counter(ivc, ivc->rx_channel, offset); in tegra_ivc_channel_notified()
361 peer_state = READ_ONCE(ivc->rx_channel->state); in tegra_ivc_channel_notified()
375 ivc->tx_channel->w_count = 0; in tegra_ivc_channel_notified()
376 ivc->rx_channel->r_count = 0; in tegra_ivc_channel_notified()
378 ivc->w_pos = 0; in tegra_ivc_channel_notified()
379 ivc->r_pos = 0; in tegra_ivc_channel_notified()
391 ivc->tx_channel->state = ivc_state_ack; in tegra_ivc_channel_notified()
393 tegra_ivc_flush_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_channel_notified()
398 ivc->notify(ivc); in tegra_ivc_channel_notified()
399 } else if (ivc->tx_channel->state == ivc_state_sync && in tegra_ivc_channel_notified()
412 ivc->tx_channel->w_count = 0; in tegra_ivc_channel_notified()
413 ivc->rx_channel->r_count = 0; in tegra_ivc_channel_notified()
415 ivc->w_pos = 0; in tegra_ivc_channel_notified()
416 ivc->r_pos = 0; in tegra_ivc_channel_notified()
429 ivc->tx_channel->state = ivc_state_established; in tegra_ivc_channel_notified()
431 tegra_ivc_flush_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_channel_notified()
436 ivc->notify(ivc); in tegra_ivc_channel_notified()
437 } else if (ivc->tx_channel->state == ivc_state_ack) { in tegra_ivc_channel_notified()
451 ivc->tx_channel->state = ivc_state_established; in tegra_ivc_channel_notified()
453 tegra_ivc_flush_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_channel_notified()
458 ivc->notify(ivc); in tegra_ivc_channel_notified()
468 if (ivc->tx_channel->state != ivc_state_established) in tegra_ivc_channel_notified()
474 void tegra_ivc_channel_reset(struct tegra_ivc *ivc) in tegra_ivc_channel_reset() argument
478 ivc->tx_channel->state = ivc_state_sync; in tegra_ivc_channel_reset()
480 tegra_ivc_flush_counter(ivc, ivc->tx_channel, offset); in tegra_ivc_channel_reset()
481 ivc->notify(ivc); in tegra_ivc_channel_reset()
532 int tegra_ivc_init(struct tegra_ivc *ivc, ulong rx_base, ulong tx_base, in tegra_ivc_init() argument
538 if (!ivc) in tegra_ivc_init()
545 ivc->rx_channel = (struct tegra_ivc_channel_header *)rx_base; in tegra_ivc_init()
546 ivc->tx_channel = (struct tegra_ivc_channel_header *)tx_base; in tegra_ivc_init()
547 ivc->w_pos = 0; in tegra_ivc_init()
548 ivc->r_pos = 0; in tegra_ivc_init()
549 ivc->nframes = nframes; in tegra_ivc_init()
550 ivc->frame_size = frame_size; in tegra_ivc_init()
551 ivc->notify = notify; in tegra_ivc_init()