Lines Matching refs:r5
41 mrc p15, 0, r5, c1, c1, 0 @ Read SCR
42 bic r5, r5, #1 @ Secure mode
43 mcr p15, 0, r5, c1, c1, 0 @ Write SCR
48 ldr r5, [r4]
49 orr r5, r5, #NS_RST_VEC_WR_DIS
50 str r5, [r4]
54 adr r5, _sys_clock_freq
58 streq r7, [r5]
60 ldrne r7, [r5]
77 mov r5, #(CSR_ENABLE)
79 add r5, r4, lsl r0
80 str r5, [r6, r2]
87 push {r4, r5, r6, lr}
97 ldr r5, =psci_cpu_entry
98 str r5, [r6]
103 mov r5, #(CSR_IMMEDIATE_WAKE | CSR_ENABLE)
104 str r5, [r6, r2]
107 pop {r4, r5, r6, pc}