Lines Matching refs:cpm_regs
374 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in pll_init_one() local
375 void __iomem *pll_reg = cpm_regs + CPM_CPAPCR + ((pll - 1) * 4); in pll_init_one()
386 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in cpu_mux_select() local
407 clrsetbits_le32(cpm_regs + CPM_CPCCR, 0x00ffffff, clk_ctrl); in cpu_mux_select()
409 while (readl(cpm_regs + CPM_CPCSR) & (CPM_CPCSR_CDIV_BUSY | in cpu_mux_select()
421 clrsetbits_le32(cpm_regs + CPM_CPCCR, 0xff << 24, clk_ctrl); in cpu_mux_select()
426 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in ddr_mux_select() local
432 cpm_regs + CPM_DDCDR); in ddr_mux_select()
434 while (readl(cpm_regs + CPM_DDCDR) & CPM_DDRCDR_DDR_BUSY) in ddr_mux_select()
437 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_DDR0); in ddr_mux_select()
444 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in cgu_mux_init() local
450 cpm_regs + cgu[i].reg); in cgu_mux_init()
455 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in pll_init() local
472 clrsetbits_le32(cpm_regs + CPM_CPPCR, 0xfffff, (16 << 8) | 0x20); in pll_init()
486 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in jz4780_clk_get_efuse_clk() local
487 u32 cpccr = readl(cpm_regs + CPM_CPCCR); in jz4780_clk_get_efuse_clk()
495 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in jz4780_clk_ungate_ethernet() local
497 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_MAC); in jz4780_clk_ungate_ethernet()
498 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_NEMC); in jz4780_clk_ungate_ethernet()
503 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in jz4780_clk_ungate_mmc() local
507 writel(msc_cdr, cpm_regs + CPM_MSCCDR); in jz4780_clk_ungate_mmc()
508 writel(msc_cdr, cpm_regs + CPM_MSCCDR1); in jz4780_clk_ungate_mmc()
509 writel(msc_cdr, cpm_regs + CPM_MSCCDR2); in jz4780_clk_ungate_mmc()
512 while (readl(cpm_regs + CPM_MSCCDR1) & CPM_MSCCDR_MSC_BUSY) in jz4780_clk_ungate_mmc()
518 void __iomem *cpm_regs = (void __iomem *)CPM_BASE; in jz4780_clk_ungate_uart() local
521 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_UART0); in jz4780_clk_ungate_uart()
523 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_UART1); in jz4780_clk_ungate_uart()
525 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_UART2); in jz4780_clk_ungate_uart()
527 clrbits_le32(cpm_regs + CPM_CLKGR0, CPM_CLKGR0_UART3); in jz4780_clk_ungate_uart()
529 clrbits_le32(cpm_regs + CPM_CLKGR1, CPM_CLKGR1_UART4); in jz4780_clk_ungate_uart()