Lines Matching refs:ICPU_MEMPHY_CFG
378 setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_FIFO_RST); in memphy_soft_reset()
380 clrbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_FIFO_RST); in memphy_soft_reset()
469 writel(readl(BASE_CFG + ICPU_MEMPHY_CFG) | in hal_vcoreiii_ddr_reset_assert()
470 ICPU_MEMPHY_CFG_PHY_RST, BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_reset_assert()
651 setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_RST); in hal_vcoreiii_ddr_reset_assert()
661 register u32 memphy_cfg = readl(BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
665 BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
667 BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
669 BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_ddr_failed()
754 writel(ICPU_MEMPHY_CFG_PHY_SSTL_ENA, BASE_CFG + ICPU_MEMPHY_CFG); in hal_vcoreiii_init_memctl()
775 setbits_le32(BASE_CFG + ICPU_MEMPHY_CFG, ICPU_MEMPHY_CFG_PHY_ODT_OE | in hal_vcoreiii_init_memctl()