Lines Matching refs:uint
15 uint mr; /* DMA mode register */
31 uint sr; /* DMA status register */
36 uint cdar; /* DMA current descriptor address register */
38 uint sar; /* DMA source address register */
40 uint dar; /* DMA destination address register */
42 uint bcr; /* DMA byte count register */
43 uint ndar; /* DMA next descriptor address register */
44 uint gsr; /* DMA general status register (DMA3 ONLY!) */
49 uint mr; /* DMA mode register */
70 uint sr; /* DMA status register */
79 uint clndar; /* DMA current link descriptor address register */
80 uint satr; /* DMA source attributes register */
90 uint sar; /* DMA source address register */
91 uint datr; /* DMA destination attributes register */
102 uint dar; /* DMA destination address register */
103 uint bcr; /* DMA byte count register */
105 uint nlndar; /* DMA next link descriptor address register */
107 uint clabdar; /* DMA current List - alternate base descriptor address Register */
109 uint nlsdar; /* DMA next list descriptor address register */
110 uint ssr; /* DMA source stride register */
111 uint dsr; /* DMA destination stride register */
120 void dma_meminit(uint val, uint size);