Lines Matching refs:msr_write
84 msr_write(MSR_IA32_FEATURE_CONTROL, msr); in enable_vmx()
212 msr_write(MSR_PKG_POWER_LIMIT, limit); in set_power_limits()
219 msr_write(MSR_TURBO_ACTIVATION_RATIO, limit); in set_power_limits()
235 msr_write(MSR_PMG_CST_CONFIG_CTL, msr); in configure_c_states()
241 msr_write(MSR_PMG_IO_CAPTURE_ADR, msr); in configure_c_states()
245 msr_write(MSR_MISC_PWR_MGMT, msr); in configure_c_states()
251 msr_write(MSR_POWER_CTL, msr); in configure_c_states()
256 msr_write(MSR_PKGC3_IRTL, msr); in configure_c_states()
261 msr_write(MSR_PKGC6_IRTL, msr); in configure_c_states()
266 msr_write(MSR_PKGC7_IRTL, msr); in configure_c_states()
272 msr_write(MSR_PP0_CURRENT_CONFIG, msr); in configure_c_states()
282 msr_write(MSR_PP1_CURRENT_CONFIG, msr); in configure_c_states()
293 msr_write(IA32_MISC_ENABLE, msr); in configure_misc()
298 msr_write(IA32_THERM_INTERRUPT, msr); in configure_misc()
303 msr_write(IA32_PACKAGE_THERM_INTERRUPT, msr); in configure_misc()
312 msr_write(MSR_PIC_MSG_CONTROL, msr); in enable_lapic_tpr()
325 msr_write(IA32_PLATFORM_DCA_CAP, msr); in configure_dca_cap()
355 msr_write(IA32_ENERGY_PERFORMANCE_BIAS, msr); in set_energy_perf_bias()
369 msr_write(IA32_MC0_STATUS + (i * 4), msr); in configure_mca()